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参数资料
| 型号： | ICS9248YF-199-T |
| 英文描述： | Frequency Generator for SIS 735/740 with AMD K7 Processor |
| 中文描述： | 频率发生器与AMD k7的处理器为SIS的740分之735 |
| 文件页数： | 17/21页 |
| 文件大小： | 181K |
| 代理商： | ICS9248YF-199-T |
17
ICS9248-199
0376E—12/23/02
CPU_STOP# Timing Diagram
CPU_STOP# is an asychronous input to the clock synthesizer. It is used to turn off the CPU clocks for low power
operation. CPU_STOP# is synchronized by the
ICS9248-199
. The minimum that the CPU clock is enabled
(CPU_STOP# high pulse) is 100 CPU clocks. All other clocks will continue to run while the CPU clocks are disabled.
The CPU clocks will always be stopped in a low state and start in such a manner that guarantees the high pulse width
is a full pulse. CPU clock on latency is less than 4 CPU clocks and CPU clock off latency is less than 4 CPU clocks.
Notes:
1. All timing is referenced to the internal CPU clock.
2. CPU_STOP# is an asynchronous input and metastable conditions may exist. This signal is
synchronized to the CPU clocks inside the ICS9248-199.
3. All other clocks continue to run undisturbed.
PCICLK
CPUCLKT
CPUCLKC
PD# (High)
CPU_STOP#
INTERNAL
CPUCLK
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS9248YF-39 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Generator & Integrated Buffers for PENTIUM/ProTM |
| ICS9248YF-64 | 制造商:ICS 制造商全称:ICS 功能描述:AMD-K7TM System Clock Chip |
| ICS9248YF-65 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENDIUM II Systems |
| ICS9248YF-66 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENTIUM II Systems |
| ICS9248YF-72 | 制造商:ICS 制造商全称:ICS 功能描述:Frequency Timing Generator for PENTIUM II Systems |
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