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参数资料
| 型号： | ICS94241FLF-T |
| 英文描述： | Programmable TCH⑩ for Differential PIII⑩ Processor |
| 中文描述： | 可编程清桦⑩⑩微分PIII处理器 |
| 文件页数： | 8/16页 |
| 文件大小： | 153K |
| 代理商： | ICS94241FLF-T |
8
ICS94241
0453C—10/26/04
Byte 13: Spread Sectrum Control Register
Byte 14: Spread Sectrum Control Register
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
X
X
X
X
X
X
X
X
P
n
o
D
B
m
u
p
m
u
p
m
u
p
m
u
p
m
u
p
m
u
p
m
u
p
m
u
p
7
6
5
4
3
2
1
0
7
6
B
5
B
4
B
3
B
2
B
1
B
0
B
S
S
S
S
S
S
S
S
d
d
d
d
d
d
d
d
a
S
a
S
a
S
a
S
a
S
a
S
a
S
a
S
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
X
X
X
X
X
X
X
X
P
n
o
D
7
6
5
4
3
2
1
0
d
d
d
S
S
S
S
S
e
e
e
v
R
v
R
v
R
a
S
a
S
a
S
a
S
a
S
2
1
0
1
B
1
B
1
B
i
B
8
B
m
m
m
m
m
u
p
u
p
u
p
u
p
u
p
d
d
d
d
d
9
Note: Please utilize software utility provided by ICS
Application Engineering to configure spread
spectrum. Incorrect spread percentage may cause
system failure.
Byte 15: Output Skew Control
Byte 16: Output Skew Control
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
0
1
1
0
0
1
1
0
P
n
o
D
7
6
5
4
3
2
1
0
l
o
C
w
e
k
S
0
K
L
C
I
C
P
l
o
C
w
e
k
S
)
K
L
C
I
C
P
Byte 17: Output Rise/Fall Time Select Register
Byte 18: Output Rise/Fall Time Select Register
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
1
0
1
0
1
0
1
0
P
n
o
D
7
6
5
4
3
2
1
0
l
o
C
e
R
w
e
)
K
L
C
I
C
P
l
o
C
e
R
w
e
0
K
L
C
I
C
P
l
o
C
e
R
w
e
z
H
M
8
4
l
o
C
e
R
w
e
z
H
M
4
2
Notes:
1. PWD = Power on Default
2. The power on default for byte 13-20 depends on the harware (latch inputs FS[0:4]) or I
2
C (Byte 0 bit [1:7]) setting.
Be sure to read back and re-write the values of these 8 registers when VCO frequency change is desired for the first
pass.
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
0
0
0
0
0
0
0
0
P
n
o
D
7
6
5
4
3
2
1
0
l
o
C
w
e
k
S
)
1
M
A
R
D
S
l
o
C
w
e
k
S
S
C
_
K
L
C
U
P
C
l
o
C
w
e
k
S
0
K
L
C
U
P
C
l
o
C
w
e
k
S
0
M
A
R
D
S
t
t
B
t
B
t
B
t
B
t
B
t
B
t
B
t
B
B
D
W
1
0
1
0
1
0
1
0
P
n
o
D
7
6
5
4
3
2
1
0
l
o
C
e
R
w
e
S
C
_
K
L
C
U
P
C
l
o
C
e
R
w
e
0
K
L
C
U
P
C
l
o
C
e
R
w
e
0
M
A
R
D
S
l
o
C
e
R
w
e
)
1
M
A
R
D
S
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