- 您现在的位置：买卖IC网 > PDF目录67707 > ICS950104YFT 166 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 PDF资料下载
参数资料
| 型号： | ICS950104YFT |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 166 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, MO-118, SSOP-48 |
| 文件页数： | 9/19页 |
| 文件大小： | 222K |
| 代理商： | ICS950104YFT |
17
ICS950104
Advance Information
Third party brands and names are the property of their respective owners.
PD# Timing Diagram
The power down selection is used to put the part into a very low power state without turning off the power to the part. PD# is
an asynchronous active low input. This signal needs to be synchronized internal to the device prior to powering down the clock
synthesizer.
Internal clocks are not running after the device is put in power down. When PD# is active low all clocks need to be driven to a
low value and held prior to turning off the VCOs and crystal. The power up latency needs to be less than 3 mS. The power down
latency should be as short as possible but conforming to the sequence requirements shown below. PCI_STOP# and
CPU_STOP# are considered to be don't cares during the power down operations. The REF and 48MHz clocks are expected to
be stopped in the LOW state as soon as possible. Due to the state of the internal logic, stopping and holding the REF clock
outputs in the LOW state may require more than one clock cycle to complete.
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS94252 device).
2. As shown, the outputs Stop Low on the next falling edge after PD# goes low.
3. PD# is an asynchronous input and metastable conditions may exist. This signal is synchronized inside this part.
4. The shaded sections on the VCO and the Crystal signals indicate an active clock.
5. Diagrams shown with respect to 133MHz. Similar operation when CPU is 100MHz.
CPUCLK
PCICLK
VCO
Crystal
PD#
相关PDF资料 |
PDF描述 |
|---|---|
| ICS950201YFT | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| ICS950201YFT | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| ICS950201YF-T | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| ICS950201YGLF-T | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| ICS950201YFLF-T | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS950201 | 制造商:ICS 制造商全称:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950201AFLF | 功能描述:IC TIMING CTRL HUB P4 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:TCH™ 标准包装:1 系列:- 类型:时钟/频率发生器，多路复用器 PLL:是 主要目的:存储器，RDRAM 输入:晶体 输出:LVCMOS 电路数:1 比率 - 输入:输出:1:2 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:Digi-Reel® 其它名称:296-6719-6 |
| ICS950201AFLFT | 功能描述:IC TIMING CTRL HUB P4 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:TCH™ 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| ICS950201AFT-IB0 | 制造商:Ics 功能描述:ELECTRONIC COMPONENT 制造商:Integrated Device Technology Inc 功能描述:ELECTRONIC COMPONENT |
| ICS950201AG | 制造商:INT_CIR_SYS 功能描述: |
发布紧急采购，3分钟左右您将得到回复。