参数资料
型号: ICS950813YFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封装: 0.300 INCH, MO-118, SSOP-56
文件页数: 8/22页
文件大小: 253K
代理商: ICS950813YFT
16
ICS950813
Advance Information
0708—10/10/02
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock,
there is no defined phase relationship between 3V66_1_VCH and other 3V66 clocks. The PCI group should lag 3V66
by the standard skew described below as Tpci.
Un-Buffered Mode 3V66 & PCI Phase Relationship
Group to Group Skews at Common Transition Edges: Unbuffered Mode
GROUP
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
3V66 to PCI
1,2
S3V66-PCI
3V66 (5:0) leads 33MHz PCI
1.5
2.55
3.5
ns
1Guarenteed by design, not 100% tested in production.
2500ps Tolerance
E_PCICLK to PCICLK Skews
GROUP
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TE_PCI-PCI1
E_PCICLK1 (pin 11)=0
E_PCICLK3 (pin 13)=1
0.3
0.5
0.7
ns
TE_PCI-PCI2
E_PCICLK1 (pin 11)=1
E_PCICLK3 (pin 13)=0
0.8
1.0
1.2
ns
TE_PCI-PCI3
E_PCICLK1 (pin 11)=1
E_PCICLK3 (pin 13)=1
1.3
1.5
1.7
ns
1Guaranteed by design, not 100% tested in production.
E_PCICLK to PCICLK
1
3V66 (1:0)
3V66 (4:2)
3V66_5
E_PCICLK (3,1)
PCICLK_F (2:0) PCICLK (6:0)
Tpci
Tepci
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