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参数资料
| 型号： | ICSSSTUAF32866CHLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 通用总线功能 |
| 英文描述： | 25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| 中文描述： | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96 |
| 封装： | LEAD FREE, MO-205CC, LFBGA-96 |
| 文件页数： | 14/31页 |
| 文件大小： | 562K |
| 代理商： | ICSSSTUAF32866CHLFT |
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ICSSSTUAF32866C
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
14
ICSSSTUAF32866C
7100/9
DC Electrical Characteristics Over Operating Range
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= 0°C to +70°C, V
DD
= 1.7V to 1.9V.
Parameter
V
IK
V
OH
Output HIGH Voltage
V
OL
Output LOW Voltage
QERR Output LOW
Voltage
I
IL
All Inputs
Static Standby
Symbol
Test Conditions
Min.
Typ.
Max.
-1.2
Units
V
V
V
V
I
I
= -18mA
I
OH
= -6mA
I
OL
= 6mA
I
ERROL
= 25mA, V
DD
= 1.7V
1.2
0.5
0.5
V
ERROL
V
I
= V
DD
or GND; V
DD
= 1.9V
I
O
= 0, V
DD
= 1.9V, RESET = GND
I
O
= 0, V
DD
= 1.9V, RESET = V
DD
, V
I
=
V
IH
(
AC
) or V
IL
(
AC
), CLK = CLK =
V
IH
(
AC
) or V
IL
(
AC
)
I
O
= 0, V
DD
= 1.9V, RESET = V
DD
, V
I
=
V
IH
(
AC
) or V
IL
(
AC
), CLK = V
IH
(
AC
), CLK
= V
IL
(
AC
)
I
O
= 0, V
DD
= 1.8V, RESET = V
DD
, V
I
=
V
IH
(
AC
) or V
IL
(
AC
), CLK and CLK
switching 50% duty cycle
I
O
= 0, V
DD
= 1.8V, RESET =
V
DD
, V
I
= V
IH
(
AC
) or V
IL
(
AC
),
CLK and CLK switching 50%
duty cycle. One data input
switching at half clock
frequency, 50% duty cycle.
V
I
= V
REF
± 350mV
V
ICR
= 1.25V, V
IPP
= 360mV
V
I
= V
DD
or GND
-5
+5
100
μ
A
μ
A
I
DD
Static Operating
10
mA
90
I
DDD
Dynamic Operating
(clock only)
210
μ
A/Clock
MHz
Dynamic Operating
(per each data input)
1:1
mode
1:2
mode
65
μ
A/Clock
MHz/
Data
Input
120
C
IN
Data Inputs
CLK and CLK
RESET
2
2
3
3
pF
5
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