参数资料
型号: ICSSSTUAF32866CHLFT
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 通用总线功能
英文描述: 25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
中文描述: 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
封装: LEAD FREE, MO-205CC, LFBGA-96
文件页数: 18/31页
文件大小: 562K
代理商: ICSSSTUAF32866CHLFT
ICSSSTUAF32866C
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
18
ICSSSTUAF32866C
7100/9
Register Timing
Timing Diagram for the First SSTUAF32866C Used as a Single Device; C0 = 0, C1 = 0, RESET Held HIGH
NOTE:
1.If the data is clocked in on the n clock pulse, the QERR output signal will be generated on the n+2 clock pulse, and it will be valid on the n+3 clock pulse.
If an error occurs and the QERR output is driven low, it stays latched low for a minimum of two clock cycles or until RESET is driven low.
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ICSSSTUAF32868B 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
ICSSSTUAF32868BHLF 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
ICSSSTUAF32869A 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2