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参数资料
| 型号： | ICSSSTUAF32868AHLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 通用总线功能 |
| 英文描述： | 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| 中文描述： | 32868 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA176 |
| 封装： | LEAD FREE, MO-246, LFBGA-176 |
| 文件页数： | 15/22页 |
| 文件大小： | 468K |
| 代理商： | ICSSSTUAF32868AHLFT |
ICSSSTUAF32868A
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
15
ICSSSTUAF32868A
7094/14
Register Timing
NOTES:
1.After RESET is switched from LOW to HIGH, all data and PAR_IN inputs signals must be set and held LOW for a
minimum time of t
ACTMAX
, to avoid false error.
2.If the data is clocked in on the n clock pulse, the QERR output signal will be generated on the n+2 clock pulse, and
it will be valid on the n+3 clock pulse.
n
n +1
n + 2
n + 3
n + 4
t
PDM,
t
PDMSS
CLK to Q
t
SU
CLK
CLK
Dn, DODTn,
DCKEn
PARIN
QERR
Qn, QODTn,
QCKEn
t
PHL
t
SU
t
H
t
ACT
t
H
Data to QERR Latency
CLK to QERR
CLK to QERR
t
PHL,
t
PLH
DCS1
DCS0
CSGEN
RESET
H, L, or X
H or L
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相关代理商/技术参数 |
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|---|---|
| ICSSSTUAF32868B | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32868BHLF | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32869A | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAF32869AHLF | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
| ICSSSTUAH32865A | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
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