参数资料
型号: IDT70V9199L9PFI
厂商: IDT, Integrated Device Technology Inc
文件页数: 10/17页
文件大小: 0K
描述: IC SRAM 1.125MBIT 9NS 100TQFP
标准包装: 6
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,同步
存储容量: 1.125M(128K x 9)
速度: 9ns
接口: 并联
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 100-LQFP
供应商设备封装: 100-TQFP(14x14)
包装: 托盘
其它名称: 70V9199L9PFI
IDT70V9199/099L
High-Speed 3.3V 128K x9/x8 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Timing Waveform of a Bank Select Pipelined Read (1,2)
t CYC2
CLK
t CH2
t CL2
t SA
t HA
ADDRESS (B1)
A 0
A 1
A 2
A 3
A 4
A 5
A 6
t SC
t HC
CE 0(B1)
t SC
t HC
DATA OUT(B1)
t CD2
Q 0
t CD2
Q 1
t CKHZ (3)
t CD2
Q 3
t DC
t DC
t CKLZ
(3)
t CKHZ (3)
t SA
t HA
ADDRESS (B2)
A 0
A 1
A 2
A 3
A 4
A 5
A 6
t SC t HC
CE 0(B2)
t SC
t HC
t CD2
t CKHZ
(3)
t CD2
DATA OUT(B2)
t CKLZ (3)
Q 2
t CKLZ (3)
Q 4
4859 drw 08
Timing Waveform with Port-to-Port Flow-Through Read (4,5,7)
CLK "A"
t SW t HW
R/ W "A"
t SA
t HA
ADDRESS "A"
DATA IN "A"
MATCH
t SD
t HD
VALID
t CCS
(6)
NO
MATCH
CLK "B"
t CD1
R/ W "B"
t SW
t SA
t HW
t HA
ADDRESS "B"
MATCH
NO
MATCH
NOTES:
DATA OUT "B"
t DC
t CWDD
(6)
VALID
t CD1
t DC
VALID
4859 drw 09
1. B1 Represents Bank #1; B2 Represents Bank #2. Each Bank consists of one IDT70V9199/099 for this waveform, and are setup for depth expansion in this
example. ADDRESS (B1) = ADDRESS (B2) in this situation.
2. OE and ADS = V IL ; CE 1(B1) , CE 1(B2) , R/ W and CNTRST = V IH .
3. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
4. CE 0 and ADS = V IL ; CE 1 and CNTRST = V IH .
5. OE = V IL for the Right Port, which is being read from. OE = V IH for the Left Port, which is being written to.
6. If t CCS < maximum specified, then data from right port READ is not valid until the maximum specified for t CWDD .
If t CCS > maximum specified, then data from right port READ is not valid until t CCS + t CD1 . t CWDD does not apply in this case.
7. All timing is the same for both Left and Right ports. Port "A" may be either Left or Right port. Port "B" is the opposite from Port "A".
10
6.42
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