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参数资料
| 型号： | IDT723642L15PF8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 5/25页 |
| 文件大小： | 0K |
| 描述： | IC FIFO SYNC 2048X36 120QFP |
| 标准包装： | 750 |
| 系列： | 7200 |
| 功能： | 同步 |
| 存储容量： | 72K（2K x 36） |
| 数据速率： | 67MHz |
| 访问时间： | 15ns |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 120-LQFP |
| 供应商设备封装： | 120-TQFP（14x14） |
| 包装： | 带卷 (TR) |
| 其它名称： | 723642L15PF8 |
13
IDT723622/723632/723642 CMOS SyncBiFIFO
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
COMMERCIALTEMPERATURERANGE
in memory to [256/512/1,024-(Y+1)]. Otherwise, the subsequent synchroniz-
ing clock cycle may be the first synchronization cycle (see Figures 14 and 15).
MAILBOX REGISTERS
Each FIFO has a 36-bit bypass register to pass command and control
information between port A and port B without putting it in queue. The
Mailbox select (MBA, MBB) inputs choose between a mail register and a
FIFO for a port data transfer operation. A LOW-to-HIGH transition on CLKA
writesA0-A35datatothemail1registerwhenaportAWriteisselectedby
CSA,
W/
RA,andENAandwithMBAHIGH.ALOW-to-HIGHtransitiononCLKBwrites
B0-B35 data to the mail2 register when a port B Write is selected by
CSB, W/
RB, and ENB and with MBB HIGH. Writing data to a mail register sets its
corresponding flag (
MBF1orMBF2)LOW.Attemptedwritestoamailregister
are ignored while the mail flag is LOW.
When data outputs of a port are active, the data on the bus comes from
the FIFO output register when the port Mailbox select input is LOW and from
the mail register when the port-mailbox select input is HIGH. The Mail1
RegisterFlag(
MBF1)issetHIGHbyaLOW-to-HIGHtransitiononCLKBwhen
a port B Read is selected by
CSB, W/RB, and ENB and with MBB HIGH. The
Mail2RegisterFlag(
MBF2)issetHIGHbyaLOW-to-HIGHtransitiononCLKA
when a port A read is selected by
CSA, W/RA, and ENA and with MBA HIGH.
The data in a mail register remains intact after it is read and changes only when
newdataiswrittentotheregister.FormailregisterandMailRegisterflagtiming
diagrams, see Figure 16 and 17.
ALMOST-FULL FLAGS (
AFA, AFB)
The Almost-Full flag of a FIFO is synchronized to the port clock that writes
data to its array. The state machine that controls an Almost-Full flag monitors a
writepointerandreadpointercomparatorthatindicateswhentheFIFOmemory
statusisalmost-full,almost-full-1,oralmost-full-2.Thealmost-fullstateisdefined
by the contents of register Y1 for
AFAandregisterY2forAFB.Theseregisters
are loaded with preset values during a FlFO reset or programmed from port
A (see Almost-Empty flag and Almost-Full flag offset programming section).
AnAlmost-FullflagisLOWwhenthenumberofwordsinitsFIFOisgreaterthan
or equal to (256-Y), (512-Y), or (1,024-Y) for the IDT723622, IDT723632, or
IDT723642respectively. AnAlmost-FullflagisHIGHwhenthenumberofwords
in its FIFO is less than or equal to [256-(Y+1)], [512-(Y+1)], or [1,024-(Y+1)]
for the IDT723622, IDT723632, or IDT723642 respectively. Note that a data
word present in the FIFO output register has been read from memory.
TwoLOW-to-HIGHtransitionsoftheAlmost-Fullflagsynchronizingclock
are required after a FIFO read for its Almost-Full flag to reflect the new level of
fill. Therefore, the Almost-Full flag of a FIFO containing [256/512/1,024-(Y+1)]
or less words remains LOW if two cycles of its synchronizing clock have not
elapsed since the read that reduced the number of words in memory to [256/
512/1,024-(Y+1)]. AnAlmost-FullflagissetHIGHbythesecondLOW-to-HIGH
transitionofitssynchronizingclockaftertheFIFOreadthatreducesthenumber
ofwordsinmemoryto[256/512/1,024-(Y+1)]. ALOW-to-HIGHtransitionofan
Almost-Full flag synchronizing clock begins the first synchronization cycle if it
occursattimetSKEW2orgreaterafterthereadthatreducesthenumberofwords
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT723642L15PFG | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO SYNC 256X36X2 120TQFP |
| IDT723642L15PFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO SYNC 256X36X2 120TQFP |
| IDT723642L15PQF | 功能描述:IC FIFO SYNC 2048X36 132QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT723642L15PQFGI | 功能描述:IC FIFO SYNC 2048X36 132QFP RoHS:是 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT723643L12PF | 功能描述:IC FIFO SYNC 1024X36 128QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
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