- 您现在的位置：买卖IC网 > PDF目录9924 > IDT723673L15PF (IDT, Integrated Device Technology Inc)IC FIFO SYNC 8192X36 128QFP PDF资料下载
参数资料
| 型号： | IDT723673L15PF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 23/29页 |
| 文件大小： | 0K |
| 描述： | IC FIFO SYNC 8192X36 128QFP |
| 标准包装： | 36 |
| 系列： | 7200 |
| 功能： | 同步 |
| 存储容量： | 288K（8K x 36） |
| 数据速率： | 67MHz |
| 访问时间： | 15ns |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-TQFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | 723673L15PF |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页当前第23页第24页第25页第26页第27页第28页第29页
3
COMMERCIALTEMPERATURERANGE
IDT723653/723663/723673 CMOS SyncFIFOTM WITH BUS-MATCHING
2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
Communication between each port may bypass the FIFO via two mailbox
registers. The mailbox registers' width matches the selected Port B bus width.
Each mailbox register has a flag (
MBF1 and MBF2) to signal when new mail
has been stored.
Two kinds of reset are available on these FIFOs: Reset and Partial Reset.
Resetinitializesthereadandwritepointerstothefirstlocationofthememoryarray
and selects serial flag programming, parallel flag programming, or one of five
possible default flag offset settings, 8, 16, 64, 256 or 1,024.
Partial Reset also sets the read and write pointers to the first location of the
memory. Unlike Reset, any settings existing prior to Partial Reset (i.e.,
programmingmethodandpartialflagdefaultoffsets)areretained.PartialReset
is useful since it permits flushing of the FIFO memory without changing any
configurationsettings.
TheFIFOhasRetransmitcapability,aRetransmitisperformedafterfourclock
cycles of CLKA and CLKB, by taking the Retransmit pin,
RT LOW while the
Retransmit Mode pin,
RTMisHIGH.WhenaRetransmitisperformedtheread
pointer is reset to the first memory location.
These devices have two modes of operation: In theIDT Standard mode, the
first word written to an empty FIFO is deposited into the memory array. A read
operation is required to access that word (along with all other words residing
in memory). In theFirst Word Fall Through mode(FWFT), the first word written
to an empty FIFO appears automatically on the outputs, no read operation
required (Nevertheless, accessing subsequent words does necessitate a
formal read request). The state of the BE/
FWFT pinduringResetdetermines
the mode in use.
The FIFO has a combined Empty/Output Ready Flag (
EF/OR ) and a
combinedFull/InputReadyFlag(
FF/IR).TheEFandFFfunctionsareselected
in the IDT Standard mode.
EF indicates whether or not the FIFO memory is
empty.
FF shows whether the memory is full or not. The IR and OR functions
are selected in the First Word Fall Through mode. IR indicates whether or not
theFIFOhasavailablememorylocations.ORshowswhethertheFIFOhasdata
available for reading or not. It marks the presence of valid data on the outputs.
TheFIFOhasaprogrammableAlmost-Emptyflag(
AE)andaprogrammable
Almost-Full flag (
AF). AE indicates when a selected number of words remain
intheFIFOmemory.
AFindicateswhentheFIFOcontainsmorethanaselected
number of words.
FF/IR andAF are two-stage synchronized to the port clock that writes data
into its array.
EF/ORandAEaretwo-stagesynchronizedtotheportclockthat
reads data from its array. Programmable offsets for
AE and AF are loaded in
parallel using Port A or in serial via the SD input. Five default offset settings are
also provided. The
AEthresholdcanbesetat8,16,64,256or1,024locations
from the empty boundary and the
AF threshold can be set at 8, 16, 64, 256 or
1,024locationsfromthefullboundary.AllthesechoicesaremadeusingtheFS0,
FS1 and FS2 inputs during Reset.
Interspersed Parity is available and can be selected during a Master Reset
oftheFIFO.IfInterspersedParityisselectedthenduringparallelprogramming
of the flag offset values, the device will ignore data line A8 . If Non-Interspersed
Parity is selected then data line A8 will become a valid bit.
Two or more devices may be used in parallel to create wider data paths. In
First Word Fall Through mode, more than one device may be connected in
series to create greater word depths. The addition of external components is
unnecessary.
If, at any time, the FIFO is not actively performing a function, the chip will
automatically power down. During the power down state, supply current
consumption(ICC)isataminimum.Initiatinganyoperation(byactivatingcontrol
inputs) will immediately take the device out of the Power Down state.
The IDT723653/723663/723673 are characterized for operation from 0
°C
to 70
°C.Industrialtemperaturerange(-40°Cto+85°C)isavailablebyspecial
order. They are fabricated using IDT’s high speed, submicron CMOS technol-
ogy.
相关PDF资料 |
PDF描述 |
|---|---|
| MX7576KP+T | IC ADC 8BIT MPU COMP 20-PLCC |
| IDT72V293L7-5PF8 | IC FIFO 65536X18 7-5NS 80QFP |
| ICL3232ECBNZ-T7A | IC TXRX RS232 DUAL ESD 16SOIC |
| MAX166DCPP+ | IC ADC 8BIT MPU COMP 20-DIP |
| IDT72V293L10PFI8 | IC FIFO 65536X18 10NS 80QFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT723673L15PF8 | 功能描述:IC FIFO SYNC 8192X36 128QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT723674L12PF | 功能描述:IC FIFO SYNC 16384X36 128QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT723674L12PF8 | 功能描述:IC FIFO SYNC 16384X36 128QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT723674L15PF | 功能描述:IC FIFO SYNC 16384X36 128QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
| IDT723674L15PF8 | 功能描述:IC FIFO SYNC 16384X36 128QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256（64 x 4） 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP（0.300"，7.62mm） 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433 |
发布紧急采购，3分钟左右您将得到回复。