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参数资料
| 型号： | IDT79R3081-40DL8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 40 MHz, RISC PROCESSOR, PQCC84 |
| 封装： | 0.050 INCH PITCH, HEAT SINK, PLASTIC, LCC-84 |
| 文件页数： | 11/41页 |
| 文件大小： | 893K |
| 代理商： | IDT79R3081-40DL8 |
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5.5
19
IDT79R3081 RISController
MILITARY AND COMMERCIAL TEMPERATURE RANGES
33MHz
40MHz
Symbol
Signals
Description
Min.
Max.
Min.
Max.
Unit
t16
Addr(3:2)
Valid from
SysClk
—
5
—
4.5
ns
t17
Diag
Valid from
SysClk
—10
—
9
ns
t18
A/D
Tri-state from
SysClk falling
—
9
—
8
ns
t19
A/D
SysClk falling to data valid
—
11
—
10
ns
t20
ClkIn (2x clock mode)
Pulse Width HIGH
6.5
—
5.6
—
ns
t21
ClkIn (2x clock mode)
Pulse Width LOW
6.5
—
5.6
—
ns
t22
ClkIn (2x clock mode)
Clock Period
15
250
12.5
250
ns
t23
Reset
Pulse Width from VCC valid
200
—
200
—
s
t24
Reset
Minimum Pulse Width
32
—
32
—
tsys
t25
Reset
Set-up to
SysClk falling
4
—
3
ns
t26
Int
Mode set-up to
Reset rising
8
—
7
—
ns
t27
Int
Mode hold from
Reset rising
0
—
0
—
ns
t28
SInt, SBrCond
Set-up to
SysClk falling
4
—
3
—
ns
t29
SInt, SBrCond
Hold from
SysClk falling
2
—
2
—
ns
t30
Int, BrCond
Set-up to
SysClk falling
4
—
3
—
ns
t31
Int, BrCond
Hold from
SysClk falling
2
—
2
—
ns
tsys
SysClk (full frequency mode)
Pulse Width(5)
2*t22
ns
t32
SysClk (full frequency mode)
Clock HIGH Time(5)
t22-1
t22+1
t22-1
t22+1
ns
t33
SysClk (full frequency mode)
Clock LOW Time(5)
t22-1
t22+1
t22-1
t22+1
ns
tsys/2
SysClk (half frequency mode) Pulse Width(5)
4*t22
ns
t34
SysClk (half frequency mode) Clock HIGH Time(5)
2*t22-1
2*t22+1
2*t22-1
2*t22+1
ns
t35
SysClk (half frequency mode) Clock LOW Time(5)
2*t22-1
2*t22+1
2*t22-1
2*t22+1
ns
t36
ALE
Set-up to
SysClk falling
7
—
6
—
ns
t37
ALE
Hold from
SysClk falling
1
—
1
—
ns
t38
A/D
Set-up to ALE falling
8
—
8
—
ns
t39
A/D
Hold from ALE falling
1
—
1
—
ns
t40
Wr
Set-up to
SysClk rising
8
—
7
—
ns
t41
Wr
Hold from
SysClk rising
3
—
3
—
ns
t42
ClkIn (1x clock mode)
Pulse Width HIGH(6)
13
—
11(6)
—ns
t43
ClkIn (1x clock mode)
Pulse Width LOW(6)
13
—
11(6)
—ns
t44
ClkIn (1x clock mode)
Clock Period(6)
30
50
25
50
ns
tderate
All outputs
Timing deration for loading over CLD(3, 4)
—
1
—
1
ns/
25pF
AC ELECTRICAL CHARACTERISTICS R3081 (cont.)
COMERCIAL TEMPERATURE RANGE
(1, 2)
(33, 40MHz)
— (TC = 0
°C to +85°C, VCC = +5.0V ±5%)
2889 tbl 11
NOTES:
1. All timings referenced to 1.5V. All timings measured with respect to a 2.5ns rise and fall time.
2. The AC values listed here reference timing diagrams contained in the
R3081 Family Hardware User's Manual.
3. Guaranteed by design.
4. This parameter is used to derate the AC timings according to the loading of the system. This parameter provides a deration for loads over the specified
test condition; that is, the deration factor is applied for each 25pF over the specified test load condition.
5. In 1x clock mode, t22 is replaced by t44/2.
6. In 1x clock mode, the design guarantees that the input clock rise and fall times can be as long as 5ns, 3ns for 40 and 50MHz.
7. When using the Reduced Frequency feature, the minimum allowed internal CPU speed is 0.5 MHz.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT79R3081-40DLG | 制造商:Integrated Device Technology Inc 功能描述:MPU R3081 RISC 32-Bit 40MHz 84-Pin PLCC |
| IDT79R3081E25DL | 制造商:Integrated Device Technology Inc 功能描述: |
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| IDT79R4650-133DP | 功能描述:IC MPU 64BIT W/DSP 133MHZ 208QFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:- 标准包装:2 系列:MPC8xx 处理器类型:32-位 MPC8xx PowerQUICC 特点:- 速度:133MHz 电压:3.3V 安装类型:表面贴装 封装/外壳:357-BBGA 供应商设备封装:357-PBGA（25x25） 包装:托盘 |
| IDT79R4700-100DP | 功能描述:IC MPU 64BIT 5V 100MHZ 208-QFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:- 标准包装:2 系列:MPC8xx 处理器类型:32-位 MPC8xx PowerQUICC 特点:- 速度:133MHz 电压:3.3V 安装类型:表面贴装 封装/外壳:357-BBGA 供应商设备封装:357-PBGA（25x25） 包装:托盘 |
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