参数资料
型号: IDT82V2041EPP8
厂商: IDT, Integrated Device Technology Inc
文件页数: 3/75页
文件大小: 0K
描述: IC LIU T1/J1/E1 1CH 44-TQFP
标准包装: 1,250
类型: 线路接口装置(LIU)
规程: E1
电源电压: 3.13 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 44-LQFP
供应商设备封装: 44-TQFP(10x10)
包装: 带卷 (TR)
其它名称: 82V2041EPP8
IDT82V2041E
SINGLE CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
Pin Description
11
December 9, 2005
CS
RXTXM1
I21
CS: Chip Select
In serial or parallel microcontroller interface mode, this is the active low enable signal. A low level on this pin enables serial or
parallel microcontroller interface.
RXTXM[1:0]: Receive and transmit path operation mode select
In hardware control mode, these pins are used to select the single rail or dual rail operation modes as well as AMI or HDB3/
B8ZS line coding:
00= single rail with HDB3/B8ZS coding
01= single rail with AMI coding
10= dual rail interface with CDR enabled
11= slicer mode (dual rail interface with CDR disabled)
INT
RXTXM0
O
I
20
INT: Interrupt Request
In software control mode, this pin outputs the general interrupt request for all interrupt sources. These interrupt sources can be
masked individually via registers (INTM0, 14H) and (INTM1, 15H). The interrupt status is reported via the registers (INTS0,
19H) and (INTS1, 1AH).
Output characteristics of this pin can be defined to be push-pull (active high or active low) or open-drain (active low) by setting
INT_PIN[1:0] (GCF, 02H).
RXTXM0
See RXTXM1 above.
SCLK
ALE
AS
LP1
I
25
SCLK: Shift Clock
In serial microcontroller interface mode, this signal is the shift clock for the serial interface. Configuration data on SDI pin is sam-
pled on the rising edge of SCLK. Configuration and status data on SDO pin is clocked out of the device on the falling edge of
SCLK if SCLKE pin is high, or on the rising edge of SCLK if SCLKE pin is low.
ALE: Address Latch Enable
In parallel microcontroller interface mode with multiplexed Intel interface, the address on AD[7:0] is sampled into the device on
the falling edge of ALE.
AS: Address Strobe
In parallel microcontroller interface mode with multiplexed Motorola interface, the address on AD[7:0] is latched into the device
on the falling edge of AS.
LP[1:0]: Loopback mode select
When the chip is configured by hardware, this pin is used to select loopback operation modes (Inband Loopback is not provided
in hardware control mode):
00= no loopback
01= analog loopback
10= digital loopback
11= remote loopback
SDI
WR
R/W
LP0
I
24
SDI: Serial Data Input
In serial microcontroller interface mode, this signal is the input data to the serial interface. Configuration data at SDI pin is sam-
pled by the device on the rising edge of SCLK.
WR: Write Strobe
In Intel parallel multiplexed interface mode, this pin is asserted low by the microcontroller to initiate a write cycle. The data on
AD[7:0] is sampled into the device in a write operation.
R/W: Read/Write Select
In Motorola parallel multiplexed interface mode, this pin is low for write operation and high for read operation.
LP0
See LP1 above.
Table-1 Pin Description (Continued)
Name
Type
Pin No.
Description
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