- 您现在的位置：买卖IC网 > PDF目录9970 > IDT82V2048BBG (IDT, Integrated Device Technology Inc)IC LIU T1/E1 8CH SHORT 160-BGA PDF资料下载
参数资料
| 型号： | IDT82V2048BBG |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 19/62页 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1 8CH SHORT 160-BGA |
| 标准包装： | 14 |
| 类型： | 线路接口装置（LIU） |
| 规程： | E1 |
| 电源电压： | 3.13 V ~ 3.47 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 160-BGA |
| 供应商设备封装： | 160-PBGA（15x15） |
| 包装： | 托盘 |
| 其它名称： | 82V2048BBG |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页当前第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页
26
IDT82V2048 OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL TEMPERATURE RANGES
2.19 INTERRUPT HANDLING
2.19.1 INTERRUPT SOURCES
There are four kinds of interrupt sources:
1. Status change in register LOS. The analog/digital loss of signal
detector continuously monitors the received signal to update the
specific bit in register LOS which indicates presence or absence
of a LOS condition.
2. Status change in register DF. The automatic power driver circuit
continuously monitors the output drivers signal to update the
specific bit in register DFM which indicates presence or absence
of an output driver short circuit condition.
3. Status change in register AIS. The AIS detector monitors the
received signal to update the specific bit in register AIS which
indicates presence or absence of a AIS condition.
4. Status change in register e-LBS. The IBLC detector monitors
the inband loopback activation or deactivation code in received
signal to update the specific bit in register e-LBS which indicates
presence or absence of an inband loopback condition.
Figure-23 Interrupt Service Routine
2.19.2 INTERRUPT ENABLE
The IDT82V2048 provides a latched interrupt output (INT) and the
four kinds of interrupts are all reported by this pin. When the Interrupt
Mask register (LOSM, DFM, AISM and e-LBM) is set to ‘1’, the Interrupt
Status register (LOSI, DFI, AISI and e-LBI) is enabled respectively.
Whenever there is a transition (‘0’ to ‘1’ or ‘1’ to ‘0’) in the corresponding
status register, the Interrupt Status register will change into ‘1’, which
means an interrupt occurs, and there will be a high to low transition on
INT pin. An external pull-up resistor of approximately 10 k
is required
to support the wire-OR operation of INT. When any of the four Interrupt
Mask registers is set to ‘0’ (the power-on default value is ‘0’), the corre-
sponding Interrupt Status register is disabled and the transition on status
register is ignored.
2.19.3 INTERRUPT CLEARING
When an interrupt occurs, the Interrupt Status registers: LOSI, DFI,
AISI and e-LBI, are read to identify the interrupt source. These registers
will be cleared to ‘0’ after the corresponding status registers: LOS, DF,
AIS and e-LBS are read. The Status registers will be cleared once the
corresponding conditions are met.
Pin INT is pulled high when there is no pending interrupt left. The
interrupt handling in the interrupt service routine is showed in Figure-23.
2.20 G.772 MONITORING
The eight channels of IDT82V2048 can all be configured to work as
regular transceivers. In applications using only seven channels (chan-
nels 1 to 7), channel 0 is configured to non-intrusively monitor any of the
other channels’ inputs or outputs on the line side. The monitoring is non-
intrusive per ITU-T G.772. Figure-24 shows the Monitoring Principle.
The receiver path or transmitter path to be monitored is configured by
pins MC[3:0] in hardware mode or by register PMON in host mode.
The monitored signal goes through the clock and data recovery
circuit of channel 0. The monitored clock can output on RCLK0 which
can be used as a timing interfaces derived from E1 signal. The moni-
tored data can be observed digitally at the output pins RCLK0, RD0/
RDP0 and RDN0. LOS detector is still in use in channel 0 for the moni-
tored signal.
In monitoring mode, channel 0 can be configured in Remote Loop-
back. The signal which is being monitored will output on TTIP0 and
TRING0. The output signal can then be connected to a standard test
equipment with an E1 electrical interface for non-intrusive monitoring.
Service the Interrupt
Read Interrupt Status Register
Read Corresponding Status
Register
Interrupt Allowed
Interrupt Condition
Exist?
Yes
No
相关PDF资料 |
PDF描述 |
|---|---|
| IDT72V3640L6BB | IC FIFO SS 1024X36 6NS 144-BGA |
| MS27508E10B35SD | CONN RCPT 13POS BOX MNT W/SCKT |
| IDT82V2048BB | IC LIU T1/E1 8CH SHORT 160-BGA |
| IDT72T3645L6-7BB | IC FIFO 1024X36 6-7NS 208-BGA |
| MAX11208AEUB+T | IC ADC 19BIT SRL 120SPS 10UMAX |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT82V2048DA | 功能描述:IC LIU T1/E1 8CH SHORT 144-TQFP RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| IDT82V2048DAG | 功能描述:IC LIU T1/E1 8CH SHORT 144-TQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| IDT82V2048E | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:OCTAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT |
| IDT82V2048EBB | 功能描述:IC LIU T1/E1 8CH SHORT 208-BGA RoHS:否 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:250 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:带卷 (TR) |
| IDT82V2048EBBG | 功能描述:IC LINE INTERFACE UNIT 208-PBGA RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:2,500 系列:- 类型:驱动器 驱动器/接收器数:4/0 规程:RS422 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC N 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。