参数资料
型号: IDT82V2084PFG8
厂商: IDT, Integrated Device Technology Inc
文件页数: 39/75页
文件大小: 0K
描述: IC LINE INTERFC UNIT 4CH 128TQFP
标准包装: 1
类型: 线路接口装置(LIU)
规程: E1
电源电压: 3.13 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-TQFP(14x20)
包装: 标准包装
其它名称: 800-1864-6
44
INDUSTRIAL
TEMPERATURE RANGES
QUAD CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
Table-43 MAINT4: Maintenance Function Control Register 4
(R/W, Address = 0EH,4EH,8EH,CEH)
Symbol
Bit
Default
Description
RIBLBA[7:0]
7-0
(000)00001 Defines the user-programmable receive Inband Loopback activate code. The default selection is 00001.
RIBLBA[7:0] form the 8-bit repeating code
RIBLBA[6:0] form the 7-bit repeating code
RIBLBA[5:0] form the 6-bit repeating code
RIBLBA[4:0] form the 5-bit repeating code
Table-44 MAINT5: Maintenance Function Control Register 5
(R/W, Address = 0FH,4FH,8FH,CFH)
Symbol
Bit
Default
Description
RIBLBD[7:0]
7-0
(00)001001 Defines the user-programmable receive Inband Loopback deactivate code. The default selection is 001001.
RIBLBD[7:0] form the 8-bit repeating code
RIBLBD[6:0] form the 7-bit repeating code
RIBLBD[5:0] form the 6-bit repeating code
RIBLBD[4:0] form the 5-bit repeating code
Table-45 MAINT6: Maintenance Function Control Register 6
(R/W, Address = 10H,50H,90H,D0H)
Symbol
Bit
Default
Description
-
7
0
Reserved.
BPV_INS
6
0
BPV error insertion
A ‘0’ to ‘1’ transition on this bit will cause a single bipolar violation error to be inserted into the transmit data
stream. This bit must be cleared and set again for a subsequent error to be inserted.
ERR_INS
5
0
PRBS/QRSS logic error insertion
A ‘0’ to ‘1’ transition on this bit will cause a single PRBS/QRSS logic error to be inserted into the transmit PRBS/
QRSS data stream. This bit must be cleared and set again for subsequent error to be inserted.
EXZ_DEF
4
0
EXZ definition select
= 0: ANSI
= 1: FCC
ERR_SEL
3-2
00
These bits choose which type of error will be counted
= 00: the PRBS logic error is counted by a 16-bit error counter.
= 01: the EXZ error is counted by a 16-bit error counter.
= 10: the Received CV (BPV) error is counted by a 16-bit error counter.
= 11: both CV (BPV) and EXZ errors are counted by a 16-bit error counter.
CNT_MD
1
0
Counter operation mode select
= 0: Manual Report Mode
= 1: Auto Report Mode
CNT_TRF
0
= 0: Clear this bit for the next ‘0’ to ‘1’ transition on this bit.
= 1: Error counting result is transferred to CNT0 and CNT1 and the error counter is reset.
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