参数资料
型号: IDT82V2604BBG
厂商: IDT, Integrated Device Technology Inc
文件页数: 6/97页
文件大小: 0K
描述: IC INVERSE MUX 4CH ATM 208-BGA
标准包装: 1
应用: 无线
接口: Utopia
电源电压: 2.97 V ~ 3.63 V
封装/外壳: 208-BGA
供应商设备封装: 208-PBGA(17x17)
包装: 托盘
安装类型: 表面贴装
其它名称: 82V2604BBG
PIN DESCRIPTION
14
December 4, 2006
IDT82V2604
Inverse Multiplexing for ATM
RSD4
RSD3
RSD2
RSD1
H2
G2
F2
E2
I
RSDn: Receive Side Data Input
RSDn contains the receive data for the n-th link.
The RSDn input is sampled on the falling edge of RSCKn or RSCCK if common clock is used.
Note: If unused, RSDn should be connected to ground.
RSCK4
RSCK3
RSCK2
RSCK1
H1
G1
F1
E1
I
RSCKn: Receive Side Clock
RSCKn contains the recovered line clock for the n-th link.
Note: If unused, RSCKn should be connected to ground.
RSF4
RSF3
RSF2
RSF1
J1
H3
G3
F3
I
RSFn: Receive Side Frame Pulse
RSFn is used to delineate each frame for the n-th link.
The RSFn input is sampled on the falling edge of RSCKn or RSCCK if common clock is used.
Note: If unused, RSFn should be connected to ground.
RSCCK
N3
I
RSCCK: Receive Side Common Clock
RSCCK is the receive clock for links that are configured in Common Clock Mode.
Note: If unused, RSCCK should be connected to ground.
RSCFS
N2
I
RSCFS: Receive Side Common Frame Pulse
RSCFS is used to delineate each frame for links that are configured in Common Clock Mode.
The RSCFS input is sampled on the falling edge of RSCCK.
Note: if unused, RSCFS should be connected to ground.
Microprocessor Interface
MPM
P15
I
MPM: Microprocessor Interface Mode
Connected to VDD for Intel; connected to GND for Motorola.
RD/DS
M15
I
RD: Read Operation
In parallel Intel microprocessor interface mode, this pin is asserted low by the microprocessor to initiate
a read cycle. Data is output to D[7:0] from the device.
DS: Data Strobe
In parallel Motorola microprocessor interface mode, this pin is the data strobe of the parallel interface.
During a write operation (RW=0), data on D[7:0] is sampled into the device. During a read operation
(RW=1), data is output to D[7:0] from the device.
WR/RW
M16
I
WR: Write Operation
In parallel Intel microprocessor interface mode, this pin is asserted low by the microprocessor to initiate
a write cycle. Data on D[7:0] is sampled into the device during a write operation.
RW: Read/Write Select
In parallel Motorola microprocessor interface mode, this pin is asserted low for write operation and high
for read operation.
D7
D6
D5
D4
D3
D2
D1
D0
P14
P13
R16
R15
R14
R13
T15
T14
I/O
D[7:0]: Data Bus
These pins function as a bi-directional data bus of the microprocessor interface.
Table-1 Pin Description (Continued)
Name
Pin Number
Input/Output
Description
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