参数资料
型号: IDTCV126PVG8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封装: GREEN, SSOP-56
文件页数: 1/15页
文件大小: 85K
代理商: IDTCV126PVG8
COMMERCIALTEMPERATURERANGE
IDTCV126
PROGRAMMABLEFLEXPCCLOCKFORP4PROCESSOR
1
FEBRUARY 2005
IDTCV126
COMMERCIAL TEMPERATURE RANGE
PROGRAMMABLE FLEXPC
CLOCK FOR P4 PROCESSOR
XTAL
Osc Amp
SM Bus
Controller
Control
Logic
CPU CLK
Output Buffers
Stop Logic
XTAL_IN
XTAL_OUT
SDATA
SCLK
VTT_PWRGD#/PD
FSA.B.C
IREF
CPU[3:0]
REF[1:0]
PLL1
SSC
N Programmable
SRC CLK
Output Buffer
Stop Logic
48MHz
Output BUffer
IREF
SRC[4:0]
48MHz
PLL2
SSC
N Programmable
PLL3
PCI[3:0], PCIF[2:0]
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2005 Integrated Device Technology, Inc.
DSC 6581/9
FEATURES:
One high precision PLL for CPU, SSC, and N programming
One high precision PLL for SRC/PCI, SSC, and N programming
One high precision PLL for 48MHz
Band-gap circuit for differential outputs
Support spread spectrum modulation, down spread 0.5% and
others
Support SMBus block read/write, index read/write
Selectable output strength for REF, 48MHz, PCI
Allows for CPU frequency to change to a higher frequency for
maximum system computing power
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
IDTCV126 is a 56 pin clock device. The CPU output buffer is designed to
support up to 400MHz processor. This chip has three PLLs inside for CPU,
SRC/PCI, and 48MHz IO clocks. This device also implements Band-gap
referenced IREF to reduce the impact of VDD variation on differential outputs,
which can provide more robust system performance. Each CPU and SRC/
PCI has its own Spread Spectrum selection, which allows for isolated changes
instead of affecting other clock groups.
OUTPUTS:
4*0.7V current –mode differential CPU CLK pair
5*0.7V current –mode differential SRC CLK pair
7*PCI, 3 free running, 33.3MHz
1*48MHz
2*REF
KEY SPECIFICATIONS:
CPU/SRC CLK cycle to cycle jitter < 85ps
PCI CLK cycle to cycle jitter < 250ps
相关PDF资料
PDF描述
IDTCV128PAG8 CV128 SERIES, PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56
IDTCV128PV CV128 SERIES, PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO56
IDTCV132APV8 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
IDTCV133PAG 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
IDTCV137PV 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
相关代理商/技术参数
参数描述
IDTCV128PAG 功能描述:IC CLK BUFFER 1-12 DIFF 56-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP (0.240",6.10mm 宽) 供应商设备封装:64-TSSOP 包装:管件
IDTCV128PAG8 功能描述:IC CLK BUFFER 1-12 DIFF 56-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP (0.240",6.10mm 宽) 供应商设备封装:64-TSSOP 包装:管件
IDTCV128PVG 功能描述:IC CLK BUFFER 1-12 DIFF 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP (0.240",6.10mm 宽) 供应商设备封装:64-TSSOP 包装:管件
IDTCV128PVG8 功能描述:IC CLK BUFFER 1-12 DIFF 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP (0.240",6.10mm 宽) 供应商设备封装:64-TSSOP 包装:管件
IDTCV132BPVG 功能描述:IC FLEXPC CLK PROGR P4 56-SSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:FlexPC™ 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP(0.209",5.30mm 宽) 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT