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参数资料
| 型号： | IMISC660EYB |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | 时钟及定时 |
| 英文描述： | LOW SKEW CLOCK DRIVER, PDSO28 |
| 封装： | SSOP-28 |
| 文件页数： | 5/7页 |
| 文件大小： | 54K |
| 代理商： | IMISC660EYB |
SC660E
I
2C System Clock Buffer for Mobile Applications
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev.2.5
2/17/2000
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Page 5 of 7
Electrical Characteristics
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Input Low Voltage
VIL
-
0.8
Vdc
-
Input High Voltage
VIH
2.0
-
Vdc
-
Input Low Current
IIL
-66
A
Input High Current
IIH
66
A
Output Low Voltage
IOL = 40mA
VOL
-
0.4
Vdc
All Outputs (see buffer spec)
Output High Voltage
IOH = 30mA
VOH
2.4
-
Vdc
All Outputs Using 3.3V Power
(see buffer spec)
Tri-State leakage Current
Ioz
-
10
A
Dynamic Supply Current
Idd66
-
160
mA
Input frequency = 66 Mhz - All outputs on
and at 30 pF load
Idd100
-
220
mA
Input frequency 100 Mhz - All outputs on
and at 30 pF load
Static Supply Current
Isdd
-
4
mA
All outputs disabled no input clock
Short Circuit Current
ISC
25
-
mA
1 output at a time - 30 seconds
Input Rise Time
TIR
2.4
-
nS
.8 to 2.4 volts
VDD = VDD1 thru VDD5 =3.3V
±5%, , TA = -40C to +85C
Switching Characteristics
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Output Duty Cycle
-
45
50
55
%
Measured at 1.5V (50/50 in)
Buffer out/out Skew All
Buffer Outputs
tSKEW
-
250
pS
35 pF Load Measured at 1.5V
Buffer input to output Skew
tSKEW
2.0
4.0
5.0
nS
Jitter Cycle to Cycle*
TJCC
50
pS
@ 35 pF loading
Jitter Absolute (Peak to
Peak)*
TJabs
150
pS
@ 35 pF loading
VDD = VDD1 thru VDD5 = 3.3V
±5%, , TA = -40C to +85C
*This jitter is additive to the input clock’s jitter.
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