参数资料
| 型号： | IP1203TR |
| 厂商： | International Rectifier |
| 文件页数： | 15/23页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 15A 24LGA |
| 产品变化通告： | (EP) Parts Discontinuation 25/May/2012 |
| 标准包装： | 1,000 |
| 系列： | iPOWIR™ |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 8 V |
| 输入电压： | 5.5 V ~ 13.2 V |
| 频率 - 开关： | 200kHz ~ 400kHz |
| 电流 - 输出： | 15A |
| 同步整流器： | 是 |
| 工作温度： | -10°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-LGA |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | LGA（9x9） |
| 配用： | IRDCIP1203-A-ND - IP1203 REFERENCE DESIGN KIT |
iP1203
R 19 = V ramp ×
× 0 2 esr × 5
×
V in
f LC
R 5
g m
1 ( 1 + sR 20 C 9 ) × ( 1 + sR 2 C 8 )
( 1 + sR 20 C 7 ) × ( 1 + sR 21 C 8 )
2. Calculate R 5 using equation (13):
1 f × f R + R 2 1
(13)
Where,
V IN = Maximum input voltage
f 0 = Error amplifier zero crossover frequency
f esr = Output capacitor C o zero frequency
f LC = Output frequency resonant filter
g m = Error amplifier transconductance. Use 2mS for
g m .
V ramp = Oscillator ramp voltage.
Use 1.25V for V ramp
3. Place a zero at 75% of f LC to cancel one of the LC
filter poles.
Type III
The Type III compensation scheme allows the use of
any type of capacitors with ESR frequency of any
range. This scheme suggests a double pole double
zero compensation and requires more components
around the error amplifier to achieve the desired gain
and phase margins. Fig. 13 represents the Type III
compensation network for iP1203.
The transfer function of the Type III compensator is
given by equation (17)
H ( s ) = × (17)
sR 2 C 9
f z = 0 . 75 ×
2 π
1
L o × C o
(14)
V ou t
R20
C7
C9
4. Calculate C 9 using equations (12) and (14)
C8
CC
Calculation of the compensation components based
on the example above, yields:
R21
R2
FB
iP1203
V
f LC = 5.0kHz
f z = 3.8kHz
f 0 = 45kHz (15% of 300kHz)
f esr = 14kHz, per equation (7) using R esr = 12m ? .
R 19 = 2.49K
C 9 = 18nF
R5
C6
REF
E/A1
Sometimes, a pole f p2 is added at half the switching
frequency to filter the switching noise. This is done
by adding a capacitor C opt in Fig.15 from the output of
the error amplifier (CC pin of iP1203) to ground. This
pole is given by equation (15):
Magnitude(dB)
H(s) dB
FZ1
FZ2
FP2
FP3
Frequency
f p 2 =
1
2 π × R 19 × C opt
(15)
Fig. 16: Typical Type III Compensation and its Gain
Plot
C opt is found from equation (16) by rearranging the
terms in equation (15) and by setting f p2 = f sw / 2:
C opt =
1
2 π × f p 2 × R 19
(16)
www.irf.com
15
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