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参数资料
| 型号： | IP82C237 |
| 厂商： | HARRIS SEMICONDUCTOR |
| 元件分类： | DMA控制器 |
| 英文描述： | CMOS High Performance Programmable DMA Controller |
| 中文描述： | 4 CHANNEL(S), 8 MHz, DMA CONTROLLER, PDIP40 |
| 文件页数： | 17/25页 |
| 文件大小： | 158K |
| 代理商： | IP82C237 |
4-164
Figure 9 shows the data bus for a 16-bit DMA application
with the 82C237. High memory and low memory are
selected accordingly with A0 and the 8/16 signal during DMA
transfers. The 8/16 signal is formed from DWLE with a D flip-
flop and ADSTB. ADSTB must be inverted to the D flip-flop
since DWLE is set up to the falling edge of ADSTB and the
74F74 latches data on the rising edge of CLK.
The ADSTB inverted could be eliminated by using a 74F75
falling edge D latch. The latch on D8-D15 is needed for 16-
bit memory-to-memory transfers. The upper eight bits of
data are latched by MEMR during the read half of the trans-
fer. The data is then enabled onto the data bus during the
write half of the transfer.
FIGURE 9. DATA BUS FOR 16-BIT DMA APPLICATION
NOTE: Only needed for memory-to-memory transfers.
HLDA
MEMCS
FROM DECODER
8/16
STB
OE
LATCH
(SEE NOTE)
HIGH
MEMORY
D8-D15
I/O
TRANSCEIVER
DEVICE
D0 - D7
CS
I/O
DEVICE
LOW
MEMORY
CS
TRANSCEIVER
IOR
IOW
MEMR
MEMW
A0
82C237
DWLE
ADSTB
D0-D7
V
CC
CLK
74F74
D
Q
80C286
D8-D15
D0-D7
82C237
相关PDF资料 |
PDF描述 |
|---|---|
| IP82C237-12 | CMOS High Performance Programmable DMA Controller |
| IP82C54-10Z | CMOS Programmable Intervel Timer |
| IP82C54Z | CMOS Programmable Intervel Timer |
| IP82C54-12 | CMOS Programmable Interval Timer |
| IP82C54 | CMOS Programmable Interval Timer |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IP82C237-12 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CMOS High Performance Programmable DMA Controller |
| IP82C37A | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| IP82C37A/+ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:DMA Controller |
| IP82C37A-12 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| IP82C37A-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
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