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参数资料
| 型号： | IPM6210ACA-T |
| 厂商： | INTERSIL CORP |
| 元件分类： | 稳压器 |
| 英文描述： | Micropower 5V, 100mA Low Dropout Linear Regulator |
| 中文描述： | 0.4 A DUAL SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封装： | PLASTIC, SSOP-28 |
| 文件页数： | 8/15页 |
| 文件大小： | 658K |
| 代理商： | IPM6210ACA-T |
8
Mode-Compensated Droop
An output voltage ‘droop’ or an active voltage positioning is
now widely used in the computer power applications. The
technique is based on raising the converter voltage at light
load in anticipation of the possible load current step.
Inversely, the output voltage is lowered at high load in
anticipation of possible load drop. The output voltage varies
with the load like it is a resistor connected in series with the
converter’s output. When done as a part of the feedback in a
closed loop, the ‘droop’ is not associated with substantial
power losses, though. There is no such a resistor in a real
circuit, but the feature is rather emulated by the feedback.
The ‘droop’ allows a reduction in size and cost of the output
capacitors required to handle the transient. Additionally, the
CPU power dissipation is also slightly reduced as it is
proportional to the applied voltage squared and even a slight
voltage decrease translates to a measurable reduction in
power dissipated.
When powering the dual mode processor, it is desired to have
an adequate “droop” (equal fractions of the programmed
output voltage) in both performance and battery-optimized
modes of operation. The traditional “droop” is normally tuned
to the worse case load, which is associated with the
performance mode. In the battery optimized mode, the CPU
operating voltage and the clock frequency are both scaled
down. Due to the constant gain in the current loop, the
traditional ‘droop’ compensates only for the operating voltage
change. The degree of the droop achieved in this case is not
the same because the CPU current is significantly lower as it
is illustrated by the following equation.
;
Where, K
CPU
is a processor constant; V
CPUi
is processor
operating voltage; F
CPUi
is processor clock frequency; K
F
is
a coefficient that varies from 0 to 1 and indicates how heavily
the processor is engaged by the software; i is a denominator
associated with the processor mode of operation
(performance or battery optimized).
TABLE 1.
PIN NAME
NOMINAL
OUT1
VOLTAGE
VID4
VID3
VID2
VID1
VID0
0
0
0
0
0
2.00
0
0
0
0
1
1.95
0
0
0
1
0
1.90
0
0
0
1
1
1.85
0
0
1
0
0
1.80
0
0
1
0
1
1.75
0
0
1
1
0
1.70
0
0
1
1
1
1.65
0
1
0
0
0
1.60
0
1
0
0
1
1.55
0
1
0
1
0
1.50
0
1
0
1
1
1.45
0
1
1
0
0
1.40
0
1
1
0
1
1.35
0
1
1
1
0
1.30
0
1
1
1
1
No CPU
1
0
0
0
0
1.275
1
0
0
0
1
1.250
1
0
0
1
0
1.225
1
0
0
1
1
1.200
1
0
1
0
0
1.175
1
0
1
0
1
1.150
1
0
1
1
0
1.125
1
0
1
1
1
1.100
1
1
0
0
0
1.075
1
1
0
0
1
1.050
1
1
0
1
0
1.025
1
1
0
1
1
1.000
1
1
1
0
0
0.975
1
1
1
0
1
0.950
1
1
1
1
0
0.925
1
1
1
1
1
No CPU
NOTE:
2. 0 = Connected to GND or V
SS
, 1 = open or connected to 3.3V
through pull-up resistors.
FIGURE 2. MODE-COMPENSATED DROOP
0
5
10
1.6
1.35
TRADITIONAL DROOP
MODE-COMPENSATED DROOP
I
CPU
V
CPU
PERFORMANCE MODE
BATTERY-OPTIMIZED MODE
I
CPU
K
CPU
xV
CPUi
xF
CPUi
xK
F
=
IPM6210A
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