参数资料
| 型号： | IPR-CSC |
| 厂商： | Altera |
| 文件页数： | 10/34页 |
| 文件大小： | 0K |
| 描述： | IP COLOR SPACE CONVERTER RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 色域转换器 |
| 许可证： | 续用许可证 |
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Performance
Builder blockset. To use this MegaCore function with DSP Builder, you
require DSP Builder v5.1 or higher and the Quartus II sofware version 5.1
or higher.
f
Performance
For more information on DSP Builder, refer to the DSP Builder User Guide
and the DSP Builder Reference Manual .
The CSC MegaCore function yields efficient implementation results, and
its parameterization allows you to fine tune these results to achieve the
utilization and performance you require.
Table 1–3 shows the resource utilization and maximum clock frequency
for several sample implementations in different device families. These all
use the computer R’G’B’ to Y’CrCb color model conversion function, and
differ in their choice of hardware implementation method, input data
width, and pipeline level. The figures were generated using the
Quartus ? II software version 5.1.
Table 1–3. CSC MegaCore Function Performance Samples
Family
Stratix
Cyclone II
Stratix II
Speed
Grade
-5
-3
-3
Hardware Implementation
Distributed Arithmetic in LUTs
Multipliers using LUTs
Multipliers using DSP blocks
Multipliers using LUTs (2)
Distributed Arithmetic in LUTs
Multipliers using LUTs
Multipliers using DSP blocks
Multipliers using LUTs (2)
Distributed Arithmetic in LUTs
Multipliers using LUTs
Multipliers using DSP blocks
Multipliers using LUTs (2)
Width of
Input
Data
8
8
8
8
8
8
8
8
10
10
10
10
Pipeline
Level
6
6
6
0
6
6
6
0
6
6
6
0
LEs
or
ALUTs
(1)
297
287
204
103
292
299
243
78
520
490
150
87
18*18
Mults
0
0
9
0
0
0
9
0
0
0
9
0
f MAX
(MHz)
314
271
260
180
216
308
230
175
380
410
270
240
Tpd
(ns)
–
–
–
5.5
–
–
–
5.7
–
–
–
4.1
Notes to Table 1–3 :
(1)
(2)
Stratix II devices use adaptive look-up tables (ALUTs); other devices use logic elements (LEs).
Yields the minimum area possible without using DSP blocks.
1–4 MegaCore Version 2.3.0
Color Space Converter MegaCore Function User Guide
Altera Corporation
October 2005
相关PDF资料 |
PDF描述 |
|---|---|
| IPR-ED8B10B | IP 8B10B ENCODER/DECODER RENEW |
| IPS-VIDEO | IP VIDEO/IMAGE PROCESSING SUITE |
| IRAC1150-300W | DEMO BOARD FOR IR1150S |
| IRAC1150-D2 | BOARD CONTROL FOR IR1150S |
| IRAC5001-HS100A | KIT EVAL ORING DEMO BOARD/IR5001 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-DDR2/UNI | 功能描述:开发软件 DDR2 SDRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-DDR3/UNI | 功能描述:开发软件 DDR3 SDRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-DP-v1.1a | 功能描述:开发软件 DisplayPort v1.1a MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-DXAUIPCS | 功能描述:开发软件 10G Ethernet Phy MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-ED8B10B | 功能描述:开发软件 8b10b Encoder/Decode MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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