参数资料
| 型号： | IPR-ED8B10B |
| 厂商： | Altera |
| 文件页数： | 1/11页 |
| 文件大小： | 0K |
| 描述： | IP 8B10B ENCODER/DECODER RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 编码器/解码器，8b/10b 用于千兆位以太网和光纤通道 |
| 许可证： | 续用许可证 |
8b10b Encoder/Decoder
MegaCore Function
(ED8B10B)
November 2001; ver. 1.02
Introduction
Data Sheet
Encoders and decoders are used for physical layer coding for Gigabit
Ethernet, Fibre Channel, and other applications. The 8b/10b encoder
takes byte inputs, and generates a direct current (DC) balanced stream
(equal number of 1s and 0s) with a maximum run length of 5. Some of the
individual 10-bit codes will have an equal number of 1s and 0s, while
others will have either four 1s and six 0s, or, six 1s and four 0s. In the latter
case, the disparity between 1s and 0s is used as an input to the next 10-bit
code generation, so that the disparity can be reversed, and maintain an
overall balanced stream. For this reason, some 8-bit inputs have two valid
10-bit codes, depending on the input disparity.
The Altera ? 8b10b Encoder/Decoder MegaCore ? Function (ED8B10B) is a
compact, high performance core capable of encoding and decoding at
Gigabit Ethernet rates (125 MHz: 1 Gbps). The ED8B10B is optimized for
the APEX TM 20K, FLEX 10K ? , and Mercury TM devices.
Features
I
I
I
I
I
Look-up table (LUT)-based implementation of encoder
Industry compatible special character coding
Complies with all applicable standards, including:
– Institute of Electrical and Electronics Engineers, IEEE 802.3z,
Media Access Control (MAC) Parameters, Physical Layer, Repeater
and Management Parameters for 1000 Mb/s Operation, 1998,
paragraphs 36.2.4.1 to 36.2.4.6.
Quartus ? II software, and OpenCore ? feature allow place-and-route
and static timing analysis of designs prior to licensing
Secure register transfer level (RTL) simulation models allow
simulation with user design in third-party simulators
Functional
Description
Altera Corporation
A-DS-IPED8B10B-1.02
The ED8B10B can encode one 8-bit byte of data into a 10-bit transmission
illustrates the bidirectional conversion process.
The eight input bits are named A , B , C , D , E , F , G , H . Bit A is the least
significant bit (LSB), and bit H is the most significant bit (MSB). They are
split into two groups: The five-bit group A , B , C , D , E , and the three-bit
group F , G , H .
The coded bits are named a , b , c , d , e , i , f , g , h , j (the order is not
alphabetical). These bits are also split into two groups: the six-bit group a ,
b , c , d , e , i , and the four-bit group f , g , h , j .
1
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