参数资料
| 型号： | IPR-CSC |
| 厂商： | Altera |
| 文件页数： | 26/34页 |
| 文件大小： | 0K |
| 描述： | IP COLOR SPACE CONVERTER RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 色域转换器 |
| 许可证： | 续用许可证 |
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Simulate the Design
Table 2–1. IP Toolbench-Generated Files (Part 2 of 2) Note (1)
Filename
<variation name> . vhd , or .v
<variation name> _bb.v
Description
A MegaCore function variation file, which defines a VHDL
or Verilog HDL top-level description of the custom
MegaCore function. Instantiate the entity defined by this
file inside of your design. Include this file when compiling
your design in the Quartus II software.
Verilog HDL black-box file for the MegaCore function
variation. Use this file when using a third-party EDA tool to
synthesize your design.
Notes to Table 2–1 :
(1)
< variation name > is the variation name.
You can now integrate your CSC MegaCore function variation into your
design and simulate and compile.
Simulate the
Design
f
Compile the
Design
f
Program a
Device
You can simulate your design using the IP Toolbench-generated VHDL
and Verilog HDL IP functional simulation models. The IP functional
environment and perform functional simulation of your custom CSC
MegaCore function.
For more information on IP functional simulation models, refer to the
Simulating Altera in Third-Party Simulation Tools chapter in volume 3 of
the Quartus II Handbook .
You can use the Quartus II software to compile your design. Refer to
Quartus II Help for instructions on performing compilation.
Refer to Quartus II Help ( F1 ) or the Introduction to Quartus II Handbook
for further instructions on compiling and analyzing your design.
After you have compiled your design, program your targeted Altera
device, and verify your design in hardware.
With Altera's free OpenCore Plus evaluation feature, you can evaluate the
CSC MegaCore function before you purchase a license. OpenCore Plus
evaluation allows you to generate an IP functional simulation model, and
produce a time-limited programming file.
2–16 MegaCore Version 2.3.0
Color Space Converter MegaCore Function User Guide
Altera Corporation
October 2005
相关PDF资料 |
PDF描述 |
|---|---|
| IPR-ED8B10B | IP 8B10B ENCODER/DECODER RENEW |
| IPS-VIDEO | IP VIDEO/IMAGE PROCESSING SUITE |
| IRAC1150-300W | DEMO BOARD FOR IR1150S |
| IRAC1150-D2 | BOARD CONTROL FOR IR1150S |
| IRAC5001-HS100A | KIT EVAL ORING DEMO BOARD/IR5001 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-DDR2/UNI | 功能描述:开发软件 DDR2 SDRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-DDR3/UNI | 功能描述:开发软件 DDR3 SDRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-DP-v1.1a | 功能描述:开发软件 DisplayPort v1.1a MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-DXAUIPCS | 功能描述:开发软件 10G Ethernet Phy MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-ED8B10B | 功能描述:开发软件 8b10b Encoder/Decode MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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