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| 型号： | IR21381QPBF |
| 厂商： | International Rectifier |
| 文件页数： | 24/30页 |
| 文件大小： | 0K |
| 描述： | IC CTLR AC MOTOR 3PHASE 64-MQFP |
| 标准包装： | 660 |
| 配置： | 3 相桥 |
| 输入类型： | 反相和非反相 |
| 延迟时间： | 550ns |
| 电流 - 峰： | 350mA |
| 配置数： | 1 |
| 输出数： | 3 |
| 高端电压 - 最大（自引导启动）： | 600V |
| 电源电压： | 12.5 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-MQFP，64-PQFP |
| 供应商设备封装： | 64-MQFP（20x14） |
| 包装： | 带卷 (TR) |
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IR22381Q PBF /IR21381Q ( P b F )
= 18 V ? 1 V ? 11 . 9 V ? 2 . 5 V = 2 . 6 V
And the bootstrap capacitor must be:
constant. The minimum on time for charging the
bootstrap capacitor or for refreshing its charge must
be verified against this time-constant.
C BOOT ≥
133 nC
2 . 6 V
= 51 nF
c. Bootstrap Capacitor
For high T HON designs where is used an electrolytic
tank capacitor, its ESR must be considered. This
NOTICE: Here above V CC has been chosen to
be 18V as an example. IGBTs can be supplied
with higher/lower supply accordingly to design
requirements. Vcc variations due to low voltage
power supply must be accounted in the above
formulas.
parasitic resistance forms a voltage divider with
R boot generating a voltage step on V BS at the first
charge of bootstrap capacitor. The voltage step and
the related speed (dV BS /dt) should be limited. As a
general rule, ESR should meet the following
constraint:
Some important considerations
a. Voltage ripple
ESR
ESR + R BOOT
? V CC ≤ 3 V
There are three different cases making the
bootstrap circuit get conductive (see Figure 23)
I LOAD < 0; the load current flows in the low side
IGBT displaying relevant V CEon
V BS = V CC ? V F ? V CEon
In this case we have the lowest value for V BS .
This represents the worst case for the bootstrap
capacitor sizing. When the IGBT is turned off the
Vs node is pushed up by the load current until the
high side freewheeling diode get forwarded
biased
I LOAD = 0; the IGBT is not loaded while being
on and V CE can be neglected
V BS = V CC ? V F
I LOAD > 0; the load current flows through the
freewheeling diode
V BS = V CC ? V F + V FP
In this case we have the highest value for V BS .
Turning on the high side IGBT, I LOAD flows into it
and V S is pulled up.
To minimize the risk of undervoltage, bootstrap
capacitor should be sized according to the I LOAD <0
case.
b. Bootstrap Resistor
A resistor (R boot ) is placed in series with bootstrap
diode (see Figure 23) so to limit the current when
the bootstrap capacitor is initially charged. We
suggest not exceeding some Ohms (typically 5,
maximum 10 Ohm) to avoid increasing the V BS time-
24
Parallel combination of small ceramic and large
electrolytic capacitors is normally the best
compromise, the first acting as fast charge thank for
the gate charge only and limiting the dV BS /dt by
reducing the equivalent resistance while the second
keeps the V BS voltage drop inside the desired ? V BS .
d. Bootstrap Diode
The diode must have a BV> 600V (or 1200V
depending on application) and a fast recovery time
(trr < 100 ns) to minimize the amount of charge fed
back from the bootstrap capacitor to V CC supply.
2.2 Gate resistances
The switching speed of the output transistor can be
controlled by properly size the resistors controlling
the turn-on and turn-off gate current. The following
section provides some basic rules for sizing the
resistors to obtain the desired switching time and
speed by introducing the equivalent output
resistance of the gate driver ( R DRp and R DRn ).
The examples always use IGBT power transistor.
Figure 24 shows the nomenclature used in the
following paragraphs. In addition, V ge* indicates the
plateau voltage, Q gc and Q ge indicate the gate to
collector and gate to emitter charge respectively.
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