参数资料
型号: IR3092M
厂商: International Rectifier
文件页数: 15/37页
文件大小: 0K
描述: IC CONTROLLER 2PHASE 48-MLPQ
标准包装: 100
应用: VID 电压编程器
电源电压: 7.3 V ~ 21 V
电流 - 电源: 29mA
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 48-MLPQ
供应商设备封装: 48-MLPQ(7x7)
包装: 剪切带 (CT)
其它名称: *IR3092M
IR3092
APPLICATIONS INFORMATION
VIN
CIN
GNDIN
ENABLE
OVP
CBST1
VIN
1
RCS1
CCS1
2
VOUT SENSE+
VOUT+
VID5
VID0
VID1
VID2
VID3
VID4
COUT
VOUT-
RFB RDAC
CDAC
RDRP
RCOMP CCOMP
RROSC
ROCSET
CSC2
VID3
VID4
ROSC
VOSNS-
OCSET
VDAC
VDRP
FB
EAOUT
SS/DEL
SCOMP
NC
IR3092
48LD MLPQ
GATEH1
PGND1
GATEL1
VCCL
5VUVL
GATEL2
PGND2
GATEH2
VCCH2
NC
NC
NC
CBST2
VIN
1
RCS2
2
CCS2
VOUT SENSE-
CSS
RSC2
Csense-
RSET
VIN
CVCC
CBIAS
POWERGOOD
Figure 6 – System Diagram
VID Control
The IR3092 provides three different microprocessor solutions. The VID_SEL pin selects the appropriate Digital-to-Analog
Converters (DAC), VID threshold voltages, and Over Voltage Protection (OVP) threshold for VR10.X, OPTERON, or
ATHLON solutions. AMD VID codes are shown in Table 1; Intel VID codes are found in Table 2. The DAC output voltage
is available at the VDAC pin. A detailed block diagram of the VID control circuitry can be found in Figure 7. The VID pins
are internally pulled up to 4.9V by 18uA current sources. The VID input comparators have a 0.6V threshold for VR10.X or
1.5V threshold for OPTERON and ATHLON. The selected DAC voltage is provided at the Error Amplifier positive input
and to the VDAC pin by the trans-conductance DAC Buffer.
The VDAC voltage is trimmed to the Error Amplifier output voltage with EAOUT tied to FB via an accurate resistor. This
compensates DAC Buffer input offset, Error Amplifier input offset, and errors in the generation of the FB bias current
which is based on R ROSC . This trim method provides 0.5% system accuracy.
The IR3092 can accept changes in the VID code while operating and vary the VDAC voltage accordingly. The IR3092
detects a VID change and blanks the DAC output response for 400ns to verify the new code is valid and not due to skew
or noise. The sink/source capability of the VDAC buffer amp is programmed by the same external resistor that sets the
oscillator frequency, R ROSC . The slew rate of the voltage at the VDAC pin can be adjusted by an external capacitor
between VDAC pin and the VOSNS- pin. A resistor connected in series with this capacitor is required to compensate the
VDAC buffer amplifier. Digital VID transitions result in a smooth analog transition of the VDAC voltage and converter
output voltage minimizing inrush currents in the input and output capacitors and overshoot of the output voltage.
Page 15 of 37
06/25/04
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