参数资料
型号: IR3092M
厂商: International Rectifier
文件页数: 2/37页
文件大小: 0K
描述: IC CONTROLLER 2PHASE 48-MLPQ
标准包装: 100
应用: VID 电压编程器
电源电压: 7.3 V ~ 21 V
电流 - 电源: 29mA
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 48-MLPQ
供应商设备封装: 48-MLPQ(7x7)
包装: 剪切带 (CT)
其它名称: *IR3092M
IR3092
PIN DESCRIPTION
PIN# PIN SYMBOL PIN DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16-17
18
19
20
21
22
23-27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43-44
45
46
47
48
VID3
VID4
ROSC
VOSNS-
OCSET
VDAC
VDRP
FB
EAOUT
SS/DEL
SCOMP
N/C
LGND
SETBIAS
VCC
N/C
BIASOUT
PWRGD
CSINP2
N/C
VID_SEL
N/C
VCCH2
GATEH2
PGND2
GATEL2
5VUVL
VCCL
GATEL1
PGND1
GATEH1
VCCH1
NC
CSINM1
CSINP1
OVP
ENABLE
N/C
VID5
VID0
VID1
VID2
Inputs to VID D to A Converter
Inputs to VID D to A Converter
Connect a resistor to VOSNS- to program oscillator frequency and FB, OCSET, BBFB, and VDAC bias currents
Remote Sense Input. Connect to ground at the Load.
Programs the hiccup over-current threshold through an external resistor tied to VDAC and an internal current
source.
Regulated voltage programmed by the VID inputs. Current Sensing and Over Current Protection are referenced
to this pin. Connect an external RC network to VOSNS- to program Dynamic VID slew rate.
Buffered IIN signal. Connect an external RC network to FB to program converter output impedance
Inverting input to the Error Amplifier. Converter output voltage is offset from the VDAC voltage through an
external resistor connected to the converter output voltage at the load and an internal current source. Bias
current is a function of ROSC. Also OVPsense.
Output of the Error Amplifier
Controls Converter Softstart, Power Good, and Over-Current Timing. Connect an external capacitor to LGND to
program the timing.
Compen sation for the Current Share control loop. Connect a capacitor to ground to set the control loop’s
bandwidth. Phase 2 is forced to match phase 1’s current.
No Connect.
Local Ground and IC substrate connection
External resistor to ground sets voltage at BIASOUT pin. Bias current is a function of ROSC.
Power for internal circuitry and source for BIASOUT regulator
No Connect.
150mA open-looped regulated voltage set by SETBIAS for GATE drive bias.
Open Collector output that drives low during Softstart or any fault condition. Connect external pull-up.
Non-inverting input to the Phase 2 Current Sense Amplifier.
No Connect.
Ground Selects VR10 VID, Float Selects OPTERON VID, VCC Selects ATHLON VID
No Connect.
Power for Phase 2 High-Side Gate Driver
Phase 2 High-Side Gate Driver Output and input to GATEL2 non-overlap comparator.
Return for Phase 2 Gate Drivers
Phase 2 Low-Side Gate Driver Output and input to GATEH2 non-overlap comparator.
Can be used to monitor the driver supply voltage or 5V supply voltage when converting from 5V. An under
voltage condition initiates Soft Start.
Power for Phase 1 and 2 Low-Side Gate Drivers.
Phase 1 Low-Side Gate Driver Output and input to GATEH1 non-overlap comparator.
Return for Phase 1 Gate Drivers
Phase 1 High-Side Gate Driver Output and input to GATEL1 non-overlap comparator.
Power for Phase 1 High-Side Gate Driver
Not connected
Inverting input to the Phase 1Current Sense Amplifier.
Non-inverting input to the Current Sense Amplifier.
Output that drives high during an Over-Voltage condition.
Enable Input. A logic low applied to this pin puts the IC into Fault mode.
No Connect.
Inputs to VID D to A Converter
Inputs to VID D to A Converter
Inputs to VID D to A Converter
Inputs to VID D to A Converter
Page 2 of 37
06/25/04
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