参数资料
型号: IR3094MPBF
厂商: International Rectifier
文件页数: 2/29页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 48MLPQ
标准包装: 200
PWM 型: 电压模式
输出数: 3
频率 - 最大: 540kHz
占空比: 100%
电源电压: 8 V ~ 16 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 150°C
封装/外壳: 48-MLPQ
包装: 剪切带 (CT)
IR3094PBF
PIN DESCRIPTION
PIN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
PIN SYMBOL
NC
NC
ROSC
VOSNS-
OCSET
VREF
VDRP
FB
EAOUT
SS/DEL
SCOMP2
SCOMP3
LGND
SETBIAS
VCC
CSINP3
CSINM3
BIASOUT
PWRGD
CSINP2
CSINM2
NC
VCCL3
GATEL3
PGND3
GATEH3
VCCH3
VCCH2
GATEH2
PGND2
GATEL2
5VUVL
VCCL1_2
GATEL1
PGND1
GATEH1
VCCH1
NC
CSINM1
CSINP1
OVP
ENABLE
OVPSNS
5VREF
NC
NC
NC
NC
PIN DESCRIPTION
Not connected
Not connected
Connect a resistor to VOSNS- to program oscillator frequency, OCSET and STBIAS bias currents.
Remote Sense Input. Connect to ground at the load.
Programs the hiccup over-current threshold through an external resistor tied to VREF and an internal current
source. The bias current is a function of ROSC.
0.85V Reference voltage. Current Sensing and Over Current Protection are referenced to this pin. An
external RC network tied to VOSNS- is needed for the compensation.
Buffered average current information. Connect an external resistor to FB to program converter output.
Inverting
.impedance input to the Error Amplifier.
Output of the Error Amplifier.
Controls Converter Softstart, Power Good, and Over-Current Timing. Connect an external capacitor to
LGND to program the timing.
Compensation for the Current Share control loop . Connect a capacitor to ground to set the control loop’s
bandwidth. Phase 2 is forced to match phase 1’s current.
Compensation for the Current Share control loop. Connect a capacitor to ground to set the control loop’s
bandwidth. Phase 3 is forced to match phase 1’s current.
Local Ground and IC substrate connection.
External resistor to ground sets voltage at BIASOUT pin. Bias current is a function of ROSC.
Power for internal circuitry and source for BIASOUT regulator.
Non-inverting input to the Phase 3 Current Sense Amplifier.
Inverting input to the Phase 3 Current Sense Amplifier.
150mA open-looped regulated voltage set by SETBIAS for GATE drive bias.
Open Collector output that drives low during Softstart or any fault condition. Connect external pull-up.
Non-inverting input to the Phase 2 Current Sense Amplifier.
Inverting input to the Phase 2 Current Sense Amplifier.
Not connected
Power for Phase 3 Low-Side Gate Driver.
Phase 3 Low-Side Gate Driver Output and input to GATEH3 non-overlap comparator.
Return for Phase 3 Gate Drivers.
Phase 3 High-Side Gate Driver Output and input to GATEL3 non-overlap comparator.
Power for Phase 3 High-Side Gate Driver.
Power for Phase 2 High-Side Gate Driver.
Phase 2 High-Side Gate Driver Output and input to GATEL2 non-overlap comparator.
Return for Phase 2 Gate Drivers.
Phase 2 Low-Side Gate Driver Output and input to GATEH2 non-overlap comparator.
Can be used to monitor the driver supply voltage or 5V supply voltage when converting from 5V. An under
voltage condition initiates Soft Start.
Power for Phase 1 and 2 Low-Side Gate Drivers.
Phase 1 Low-Side Gate Driver Output and input to GATEH1 non-overlap comparator.
Return for Phase 1 Gate Drivers.
Phase 1 High-Side Gate Driver Output and input to GATEL1 non-overlap comparator.
Power for Phase 1 High-Side Gate Driver.
Not connected
Inverting input to the Phase 1 Current Sense Amplifier.
Non-inverting input to the Current Sense Amplifier.
Output that drives high during an Over-Voltage condition.
Enable Input. A logic low applied to this pin puts the IC into Fault mode.
Dedicated output voltage sense pin for Over Voltage Protection.
Decoupling for internal voltage reference rail.
Not connected
Not connected
Not connected
Not connected
Page 2 of 29
09/26/05
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