参数资料
型号: IR3505MPBF
厂商: International Rectifier
文件页数: 11/19页
文件大小: 0K
描述: IC XPHASE3 CONTROL 16-MLPQ
标准包装: 100
系列: XPhase3™
应用: 处理器
电流 - 电源: 3mA
电源电压: 8 V ~ 16 V
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-MLPQ
供应商设备封装: 16-MLPQ(3x3)
包装: 剪切带 (CT)
IR3505
IR3505 THEORY OF OPERATION
Block Diagram
The Block diagram of the IR3505 is shown in Figure 5, and specific features are discussed in the following sections.
CLKIN
CLK Q
D
GATEH
PHSOUT
PHSIN
100% DUTY LATCH
PWM LATCH
PWMQ
DRIVER
BOOST
PWMQ
PWM_CLK
CLK Q
D
D Q
PWM_CLK
CLK Q
GATEH NON-
OVERLAP
GATEH NON-
GATEH
SW
EAIN
PWM COMPARATOR
-
RESET
DOMINANT
LATCH
Q S
OVERLAP
COMPARATOR
-
VCC
+
RMPOUT
PHSIN
VCC
CALIBRATION
PWM RAMP
GENERATOR
PWM RESET
VCCL
SET R
DOMINANT
GATEL NON-
OVERLAP
LATCH
+
1V
GATEL NON-
OVERLAP
COMPARATOR
DACIN-SHARE_ADJ
Q
S
1V
BODY BRAKING
100mV COMPARATOR
200mV
SET R
DOMINANT
GATEL
NEGATIVE
DRIVER
VCCL
DACIN +
OVP
CURRENT
LATCH
GATEL
-
SHARE_ADJ
VCCL
COMPARATOR
PGND
-
DEBUG OFF
(LOW=OPEN)
0.8V
+
RESET
DOMINANT
Q
R
S
SYNCHRONOUS RECTIFICATION
DISABLE COMPARATOR
ISHARE
SHARE
ADJUST
AMPLIFIER
3K
NEGATIVE CURRENT
COMPARATOR
-
+
-
+
CSAOUT
+
CURRENT SENSE
AMPLIFIER
-
X33
+
CSIN-
CSIN+
DACIN
CALIBRATION
IROSC
+
DACIN
X
0.75
CALIBRATION
DEBUG
COMPARATOR
0.2V
LGND
PHSIN (CLKIN
IF 1-PHASE)
-
+
under voltage or output overload. The IR3505 Body Braking
comparator detects this and drives bottom gate
IROSC
Figure 5 Block diagram
Tri-State Gate Drivers
The gate drivers can deliver up to 2A peak current (4A sink current for bottom driver). An adaptive non-overlap
circuit monitors the voltage on the GATEH and GATEL pins to prevent MOSFET shoot-through current while
minimizing body diode conduction. The non-overlap latch is added to eliminate the error triggering caused by the
switching noise. An enable signal is provided by the control IC to the phase IC without the addition of a dedicated
signal line. The error amplifier output of the control IC drives low in response to any fault condition such as VCCL
TM
output low. This tri-state operation prevents negative inductor current and negative output voltage during power-
down.
A synchronous rectification disable comparator is used to detect converter CSIN- pin voltage, which represents
local converter output voltage. If the voltage is below 75% of VDAC and negative current is detected, GATEL drives
low, which disables synchronous rectification and eliminates negative current during power-up.
The gate drivers pull low if the supply voltages are below the normal operating range. An 80k
resistor is connected
Page 11 of 19 Sept 26 , 2007
across the GATEH/GATEL and PGND pins to prevent the GATEH/GATEL voltage from rising due to leakage or
other causes under these conditions.
th
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