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参数资料
| 型号： | IR3527MTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC CTRL XPHASE3 DUAL 24-MLPQ |
| 标准包装： | 3,000 |
| 系列： | XPhase3™ |
| 应用： | 处理器 |
| 电流 - 电源： | 8mA |
| 电源电压： | 8 V ~ 28 V |
| 工作温度： | 0°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-MLPQ |
| 供应商设备封装： | 24-MLPQ（4x4） |
| 包装： | 带卷 (TR) |
under voltage or output overload. The IR3527 Body Braking
comparator detects this and drives both gate outputs
IR3527
by the control IC for voltage positioning and current limit protection. The input offset of this amplifier is calibrated to
+/- 1mV in order to reduce the current sense error.
The input offset voltage is the primary source of error for the current share loop. In order to achieve very small input
offset error and superior current sharing performance, the current sense amplifier continuously calibrates itself. This
calibration algorithm creates ripple on ISHARE bus with a frequency of f sw /(32*28) in a multiphase architecture.
Average Current Share Loop
Current sharing between phases of the converter is achieved by the average current share loop in each phase IC.
The output of the current sense amplifier is compared with the average current at the share bus. If current in a
phase is smaller than the average current, the share adjust amplifier of the phase will pull down the starting point of
the PWM ramp thereby increasing its duty cycle and output current; if current in a phase is larger than the average
current, the share adjust amplifier of the phase will pull up the starting point of the PWM ramp thereby decreasing
its duty cycle and output current. The current share amplifier is internally compensated so that the crossover
frequency of the current share loop is much slower than that of the voltage loop and the two loops do not interact.
IR3527 THEORY OF OPERATION
Block Diagram
A detailed IR3527 block diagram is enclosed (Figure 6) to help clearly illustrate the following theory of operation.
Tri-State Gate Drivers
The gate drivers can deliver up to 1.3A peak current (2.6A sink current for bottom driver). An adaptive non-overlap
circuit monitors the voltage on the GATEH and GATEL pins to prevent MOSFET shoot-through current while
minimizing body diode conduction. The non-overlap latch is added to eliminate the error triggering caused by the
switching noise. An enable signal is provided by the control IC to the phase IC without the addition of a dedicated
signal line. The error amplifier output of the control IC drives low in response to any fault condition such as VCCL
TM
low. This tri-state operation prevents negative inductor current and negative output voltage during power-down.
A synchronous rectification disable comparator is used to detect converter CSIN- pin voltage, which represents
local converter output voltage. If the voltage is below 75% of VDAC and negative current is detected, GATEL drives
low, which disables synchronous rectification and eliminates negative current during power-up.
The gate drivers pull low if the supply voltages are below the normal operating range. An 80k ? UHVLVWRU LV FRQQHFWHG
across the GATEH/GATEL and PGND pins to prevent the GATEH/GATEL voltage from rising due to leakage or
other causes under these conditions.
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V3.0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3529 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM PHASE IC |
| IR3529MPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM PHASE IC |
| IR3529MTRPBF | 功能描述:开关变换器、稳压器与控制器 2 CH OR 2 PHASE SYNC PWM CNTRLR RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
| IR3531A | 制造商:IRF 制造商全称:International Rectifier 功能描述:41 Phase Dual Output Control IC Pre-bias compatible |
| IR3531A-MPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:41 Phase Dual Output Control IC Pre-bias compatible |
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