参数资料
型号: IRS2336DSTRPBF
厂商: International Rectifier
文件页数: 19/49页
文件大小: 0K
描述: IC GATE DRIVER HV 3PHASE 28-SOIC
标准包装: 1
配置: 3 相桥
输入类型: 差分
延迟时间: 530ns
电流 - 峰: 200mA
配置数: 1
输出数: 3
高端电压 - 最大(自引导启动): 600V
电源电压: 10 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 标准包装
产品目录页面: 1382 (CN2011-ZH PDF)
其它名称: IRS2336DSTRPBFDKR
IRS2336x(D) Family
Switching and Timing Relationships
The relationship between the input and output signals of the IRS2336(D) and IRS23364D are illustrated below in
Figures 3 and 4. From these figures, we can see the definitions of several timing parameters (i.e., PW IN , PW OUT , t ON ,
t OFF , t R , and t F ) associated with this device.
LINx
LINx
(or HINx)
50%
50%
(or HINx)
50%
50%
PW IN
PW IN
t ON
t R
PW OUT
t OFF
t F
t ON
t R
PW OUT
t OFF
t F
LOx
(or HOx)
90%
10%
90%
10%
LOx
(or HOx)
90%
10%
90%
10%
Figure 3: Switching time waveforms (IRS2336(D))
Figure 4: Switching time waveforms (IRS23364D)
The following two figures illustrate the timing relationships of some of the functionality of the IRS2336xD; this
functionality is described in further detail later in this document.
During interval A of Figure 5, the HVIC has received the command to turn-on both the high- and low-side switches at
the same time; as a result, the shoot-through protection of the HVIC has prevented this condition and both the high-
and low-side output are held in the off state.
Interval B of Figures 5 and 6 shows that the signal on the ITRIP input pin has gone from a low to a high state; as a
result, all of the gate drive outputs have been disabled (i.e., see that HOx has returned to the low state; LOx is also
held low), the voltage on the RCIN pin has been pulled to 0 V, and a fault is reported by the FAULT output
transitioning to the low state. Once the ITRIP input has returned to the low state, the output will remain disabled and
the fault condition reported until the voltage on the RCIN pin charges up to V RCIN,TH (see interval C in Figure 6); the
charging characteristics are dictated by the RC network attached to the RCIN pin.
During intervals D and E of Figure 5, we can see that the enable (EN) pin has been pulled low (as is the case when
the driver IC has received a command from the control IC to shutdown); this results in the outputs (HOx and LOx)
being held in the low state until the enable pin is pulled high.
www.irf.com
19
? 2009 International Rectifier
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