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参数资料
| 型号： | IS61SF25616-8.5TQ |
| 厂商： | INTEGRATED SILICON SOLUTION INC |
| 元件分类： | SRAM |
| 英文描述： | 256K X 16 CACHE SRAM, 8.5 ns, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 5/16页 |
| 文件大小： | 108K |
| 代理商： | IS61SF25616-8.5TQ |
IS61SF25616
IS61SF25618
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
13
Rev. A
04/17/01
SNOOZE AND RECOVERY CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
8
8.5
10
12
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tKC(3)
Cycle Time
10
—
11
—
15
—
15
—
ns
tKH(3)
Clock High Time
4
—
4.5
—
4.5
—
4.5
—
ns
tKL(3)
Clock Low Time
4
—
4.5
—
4.5
—
4.5
—
ns
tKQ(3)
Clock Access Time
—
8
—
8.5
—
10
—
12
ns
tKQX(1)
Clock High to Output Invalid
2
—
2
—
2
—
2
—
ns
tKQLZ(1,2)
Clock High to Output Low-Z
0
—
0
—
0
—
0
—
ns
tKQHZ(1,2)
Clock High to Output High-Z
2
3.5
2
3.5
2
3.5
2
3.5
ns
tOEQ(3)
Output Enable to Output Valid
—
3.5
—
3.5
—
3.5
—
5ns
tOELZ(1,2)
Output Enable to Output Low-Z
0
—
0
—
0
—
0
—
ns
tOEHZ(1,2)
Output Disable to Output High-Z
—
3.5
—
3.5
—
3.5
—
3.5
ns
tAS(3)
Address Setup Time
2
—
2
—
2
—
4
—
ns
tSS(3)
Address Status Setup Time
2
—
2
—
2
—
4
—
ns
tCES(3)
Chip Enable Setup Time
2
—
2
—
2
—
4
—
ns
tAH(3)
Address Hold Time
0.5
—
0.5
—
0.5
—
1.5
—
ns
tSH(3)
Address Status Hold Time
0.5
—
0.5
—
0.5
—
1.5
—
ns
tCEH(3)
Chip Enable Hold Time
0.5
—
0.5
—
0.5
—
1.5
—
ns
tZZS
ZZ Standby
2
—
2
—
2
—
2
—
cyc
tZZREC
ZZ Recovery
2
—
2
—
2
—
2
—
cyc
Notes:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
3. Tested with load in Figure 1.
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相关代理商/技术参数 |
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| IS61SF25618-8.5TQI | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 256K x 18 8.5ns 100-Pin TQFP |
| IS61SF25618-8.5TQI-TR | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 256K x 18 8.5ns 100-Pin TQFP T/R |
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| IS61SP12836-133B | 制造商:Integrated Silicon Solution Inc 功能描述: |
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