参数资料
| 型号： | ISL12020MIRZ-T7A |
| 厂商： | Intersil |
| 文件页数： | 5/34页 |
| 文件大小： | 0K |
| 描述： | IC RTC/CALENDAR TEMP SNSR 20DFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 250 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，夏令时，闰年，SRAM |
| 存储容量： | 128B |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 电源，电池： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-LFDFN 裸露焊盘 |
| 供应商设备封装： | 20-DFN（5.5x4.0） |
| 包装： | 带卷 (TR) |
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ISL12020M
13
FN6667.5
December 13, 2011
The ALM bit can be reset by the user or cleared automatically
using the auto reset mode (see ARST bit). The alarm function can
be enabled/disabled during battery-backup mode using the
FOBATB bit. For more information on the alarm, please see
Frequency Output Mode
The ISL12020M has the option to provide a clock output signal
using the IRQ/FOUT open drain output pin. The frequency output
mode is set by using the FO bits to select 15 possible output
frequency values from 1/32Hz to 32kHz. The frequency output
can be enabled/disabled during battery-backup mode using the
FOBATB bit.
General Purpose User SRAM
The ISL12020M provides 128 bytes of user SRAM. The SRAM will
continue to operate in battery-backup mode. However, it should
be noted that the I2C bus is disabled in battery-backup mode.
I2C Serial Interface
The ISL12020M has an I2C serial bus interface that provides
access to the control and status registers and the user SRAM.
The I2C serial interface is compatible with other industry I2C
serial bus protocols using a bi-directional data signal (SDA) and a
clock signal (SCL).
Oscillator Compensation
The ISL12020M provides both initial timing correction and
temperature correction due to variation of the crystal oscillator.
Analog and digital trimming control is provided for initial
adjustment, and a temperature compensation function is provided
to automatically correct for temperature drift of the crystal. Initial
values for the initial AT and DT settings (ITR0), temperature
coefficient (ALPHA), crystal capacitance (BETA), as well as the
crystal turn-over temperature (XTO), are preset internally and
recalled to RAM registers on power-up. These values can be
overwritten by the user although this is not suggested as the
resulting temperature compensation performance will be
compromised. The compensation function can be
enabled/disabled at any time and can be used in battery mode as
well.
Register Descriptions
The battery-backed registers are accessible following a slave
byte of “1101111x” and reads or writes to addresses [00h:2Fh].
The defined addresses and default values are described in the
Table 1. The battery backed general purpose SRAM has a
different slave address (1010111x), so it is not possible to
read/write that section of memory while accessing the registers.
REGISTER ACCESS
The contents of the registers can be modified by performing a byte
or a page write operation directly to any register address.
The registers are divided into 8 sections. They are:
1. Real Time Clock (7 bytes): Address 00h to 06h.
2. Control and Status (9 bytes): Address 07h to 0Fh.
3. Alarm (6 bytes): Address 10h to 15h.
4. Time Stamp for Battery Status (5 bytes): Address 16h to 1Ah.
5. Time Stamp for VDD Status (5 bytes): Address 1Bh to 1Fh.
6. Daylight Savings Time (8 bytes): 20h to 27h.
7. TEMP (2 bytes): 28h to 29h
8. Crystal Net PPM Correction, NPPM (2 bytes): 2Ah, 2Bh
9. Crystal Turnover Temperature, XT0 (1 byte): 2Ch
10. Crystal ALPHA at high temperature, ALPHA_H (1 byte): 2Dh
11. Scratch Pad (2 bytes): Address 2Eh and 2Fh
Write capability is allowable into the RTC registers (00h to 06h)
only when the WRTC bit (bit 6 of address 08h) is set to “1”. A
multi-byte read or write operation should be limited to one
section per operation for best RTC timekeeping performance.
A register can be read by performing a random read at any
address at any time. This returns the contents of that register
location. Additional registers are read by performing a sequential
read. For the RTC and Alarm registers, the read instruction
latches all clock registers into a buffer, so an update of the clock
does not change the time being read. At the end of a read, the
master supplies a stop condition to end the operation and free
the bus. After a read, the address remains at the previous
address +1 so the user can execute a current address read and
continue reading the next register. When the previous address is
2Fh, the next address will wrap around to 00h.
It is not necessary to set the WRTC bit prior to writing into the
control and status, alarm, and user SRAM registers.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL12021 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Real Time Clock with On Chip Temp Compensation 【5ppm |
| ISL12021CVZ | 功能描述:IC RTC LP BATT BACK SRAM 14TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 实时时钟 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- 类型:时钟/日历 特点:警报器，闰年，SRAM 存储容量:- 时间格式:HH:MM:SS（12/24 小时） 数据格式:YY-MM-DD-dd 接口:SPI 电源电压:2 V ~ 5.5 V 电压 - 电源，电池:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-WDFN 裸露焊盘 供应商设备封装:8-TDFN EP 包装:管件 |
| ISL12021IVZ | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Real Time Clock with On Chip Temp Compensation 【5ppm |
| ISL12022 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Real Time Clock with On Chip ±5ppm Temp Compensation |
| ISL12022IBZ | 功能描述:实时时钟 REAL TIME CLK/CLNDR W/TEMP COMP 8 L RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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