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参数资料
| 型号： | ISL5239 |
| 厂商： | Intersil Corporation |
| 英文描述： | Pre-Distortion Linearizer |
| 中文描述： | 预失真线性化电路 |
| 文件页数： | 8/31页 |
| 文件大小： | 653K |
| 代理商： | ISL5239 |
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pre-distorter. The pre-distorter block diagram is shown in
Figure 4.
Serial Interface
The serial interface for the external memory effects
calculation consists of outputs SERCLK, SERSYNC, and
SEROUT and input SERIN. The serial output sends the 32-
bit unsigned average power off-chip for further processing.
The data is transmitted via the SEROUT pin MSB first, with
the first bit marked by a high pulse on the SERSYNC pin.
The SERCLK rate is scaled such that 32 bits are transmitted
in one period of the power integrator as controlled by register
0x18 bits 5:4. SEROUT is enabled by register 0x18 bit 12.
The SERIN receives the thermal compensation parameters
from external processing using the same SERCLK and
SERSYNC used by the SEROUT. The chip expects to
receive 32 bits of data sequentially on the SERIN pin: the
MSB of A, followed by the rest of A, then the MSB of B,
followed by the rest of B. The SERIN is enabled by register
0x18 bit 8. When SERIN is disabled, registers 0x19 and
0x1a supply the A and B parameters for the thermal
compensation calculations. See Figure 16 for a detailed
timing diagram of the serial interface.
IF Converter (IFC)
The output of the pre-distorter is a complex baseband signal
sampled at the system CLK rate. To provide greater system
flexibility, the IF Converter function can change this in one of
three different ways, providing frequency shifts, sample rate
changes and complex to real conversions.
Real 1X
The real 1x operating mode shifts the signal up by Fs/4 and
performs a complex to real conversion without changing the
base sample rate. This mode has 1/2 the bandwidth of the
original input signal, with the I output channel active and the
Q output channel set to 0. The operation of the IF converter
in this mode is shown in Figure 5.
Real 2X
The real 2x operating mode converts complex to real at 2x
the sample rate and shifts the signal up to Fs/2 (Fs/4 of the
output rate). This mode has the same bandwidth as the
original signal with the I channel carrying the first of twwo
samples/clock and the Q channel carrying the second
sample. The operation of the IF Converter in this mode is
shown in Figure 6.
FIGURE 4. PRE-DISTORTER BLOCK DIAGRAM
Q
I
I
BYPASS
FROM
IFIP
Q
I
CM TEST
P
Q
I
EFFECTS
FPGA
FUNC. SEL.
OFFSET
SCALE
PD MAG.
POWER
INTEGRATOR
LUT
PWR INTGR PER.
PWR LOW
PWR HIGH
PAR. TO SERIAL
SER. OUTPUT EN.
LUT DATA I
LUT DATA Q
LUT DELTA DATA I
LUT DELTA DATA Q
ACTIVE LUT
LUT ADDR
LUT ADDR AUTO INCR.
COEF. B SELECT
MEMORY
ADDR
POWER
SERCLK
SERSYNC
SEROUT
SERIAL TO PAR.
S
SERIAL INPUT EN.
COEF. A
COEF. B
MEMORY EFFECT
COMPENSATION
DATA
LUT
ADDRESS
CALCULATION
TEST
FIGURE 5. IF CONVERTER IN REAL 1X MODE OPERATION
Q
I
FROM
PD
HALF
BAND
FILTER
e
j(pi/2)(n)
Re{*}
I
BYPASS
FIGURE 6. IF CONVERTER IN REAL 2X MODE OPERATION
Q
I
FROM
PD
HALF
BAND
FILTER
e
j(pi/2)(n)
Re{*}
2
Z
-1
2
2
2
Q
I
BYPASS
ISL5239
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|---|---|
| ISL5239KI | Pre-Distortion Linearizer |
| ISL5239KIZ | Pre-Distortion Linearizer |
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| ISL5416EVAL | Four-Channel Wideband Programmable DownConverter |
| ISL5416KI | Four-Channel Wideband Programmable DownConverter |
相关代理商/技术参数 |
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|---|---|
| ISL5239EVAL1 | 功能描述:EVALUATION BOARD FOR ISL5239 RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| ISL5239KI | 功能描述:音频 DSP PA LINEARIZER IND TEMP 1 0MM PITCH RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| ISL5239KIZ | 功能描述:音频 DSP PA LINEARIZER IND 0MM PITCH BGA PACKAG RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| ISL5314 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Digital Synthesizer |
| ISL5314_05 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Direct Digital Synthesizer |
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