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| 型号： | ISL55143IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 10/14页 |
| 文件大小： | 0K |
| 描述： | IC COMP CMOS HS 18V 36-TQFN |
| 标准包装： | 4,000 |
| 类型： | 窗口 |
| 元件数： | 4 |
| 电压 - 电源，单路/双路(±)： | 10 V ~ 18 V |
| 电压 - 输入偏移（最小值）： | 50mV @ -3V，12V |
| 电流 - 输入偏压（最小值）： | 0.025µA @ -3V，12V |
| 电流 - 静态（最大值）： | 12.5mA |
| 传输延迟（最大）： | 15ns |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 36-WFQFN 裸露焊盘 |
| 安装类型： | 表面贴装 |
| 包装： | 带卷 (TR) |
5
FN6230.3
April 4, 2013
Input Capacitance (Note 11)
CIN
2.5
pF
DIGITAL OUTPUTS QAX, QBX
Output Resistance
RoutR
18
27
37
Ω
Output Logic High Voltage
VOH
VOH = 5V, ISOURCE = 1mA
4.9
4.95
5.0
V
Output Logic Low Voltage
VOL
VOL = 0V, ISINK = 1mA
0.00
0.05
0.1
V
POWER SUPPLIES, STATIC CONDITIONS
Positive Supply DC Current/Comparator
ICC
No input data
+8.25
12.5
mA
Negative Supply Current/Comparator
IEE
No input data
-12.5
-8.25
mA
Total Power Dissipation/Comparator
P (Note 12) Input data at 40MHz
670
mW
NOTES:
9. Lab characterization, room temperature, timing parameters matched stimulus/loads, channel-to-channel skew < 500ps, 1ns maximum by design
10. Note about ICC measurement input can approach 140mA (single comparator) at maximum pattern rates
11. Limits should be considered typical and are not production tested.
12. Total Power dissipation per comparator can be approximately calculated from the following:
P = (VCC-VEE)*8.25mW + 90pF*(VCC-VEE)^2*f + CL*(VCC-VEE)^2*f, where f is the operating frequency and CL is the load capacitance.
Because the ISL55142 has two comparators, the power dissipation would be twice of P calculated from this equation. The ISL55143 would be
four times P.
13. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Test Circuits and Waveforms
FIGURE 1. COMPARATOR PROPAGATION DELAY AND TRANSITION TIME MEASUREMENT POINTS
FIGURE 2. THREE-STATE WINDOW COMPARATOR FUNDAMENTALS
Electrical Specifications
Test Conditions: VCC = 12V, VEE = -3V, VOH = 5V, VOL = 0V, PD = VEE, CLOAD = 15pF, TA = 25°C, unless
otherwise specified. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 13)
TYP
MAX
(Note 13)
UNITS
QAX, QBX
400mV
0V
tPDLH
VOH (≈VH)
VOL (≈VL)
50%
tPDHL
VINPX
tR
tF
DATA = 1
DATA = 0
+
-
+
-
VINP
QA
QB
CVA 2.4V
CVB 0.4V
VCC
VEE
Although there is no electrical difference between the CVA
and CVB Inputs, if one defines CVA as being the high
threshold and CVB being the low threshold, it becomes
easier to understand the utilization of a dual threshold
comparator. Essentially this enables the qualification of an
incoming signal into three states. In Figure 2, the three
states are Valid Low <0.4V, No-man’s-land (between 0.4
truth table would be utilized in the real world.
TABLE 2. QA/QB TRUTH TABLE
VINP
QA
QB
COMMENT
<0.4V
0
Valid 0
>0.4 and <2.4V
0
1
Invalid
>2.4V
1
Valid 1
ISL55141, ISL55142, ISL55143
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