参数资料
型号: ISL55143IRZ-T
厂商: Intersil
文件页数: 4/14页
文件大小: 0K
描述: IC COMP CMOS HS 18V 36-TQFN
标准包装: 4,000
类型: 窗口
元件数: 4
电压 - 电源,单路/双路(±): 10 V ~ 18 V
电压 - 输入偏移(最小值): 50mV @ -3V,12V
电流 - 输入偏压(最小值): 0.025µA @ -3V,12V
电流 - 静态(最大值): 12.5mA
传输延迟(最大): 15ns
工作温度: -40°C ~ 85°C
封装/外壳: 36-WFQFN 裸露焊盘
安装类型: 表面贴装
包装: 带卷 (TR)
12
FN6230.3
April 4, 2013
ISL55141, ISL55142, ISL55143
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L20.5x5
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
SYMBOL
MILLIMETERS
NOTES
MIN
NOMINAL
MAX
A
0.80
0.90
1.00
-
A1
-
0.02
0.05
-
A2
-
0.65
1.00
9
A3
0.20 REF
9
b
0.23
0.30
0.38
5, 8
D
5.00 BSC
-
D1
4.75 BSC
9
D2
2.95
3.10
3.25
7, 8
E
5.00 BSC
-
E1
4.75 BSC
9
E2
2.95
3.10
3.25
7, 8
e
0.65 BSC
-
k0.20
-
L
0.35
0.60
0.75
8
N20
2
Nd
5
3
Ne
5
3
P-
-
0.60
9
θ
--
12
9
Rev. 4 11/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P &
θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Compliant to JEDEC MO-220VHHC Issue I except for the "b"
dimension.
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