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参数资料
| 型号： | ISL6210CRZ |
| 厂商： | Intersil |
| 文件页数： | 4/10页 |
| 文件大小： | 0K |
| 描述： | IC MOSFET DRIVER DUAL SYNC 16QFN |
| 标准包装： | 75 |
| 配置： | 高端和低端，同步 |
| 输入类型： | PWM |
| 延迟时间： | 26ns |
| 电流 - 峰： | 2A |
| 配置数： | 2 |
| 输出数： | 4 |
| 高端电压 - 最大（自引导启动）： | 36V |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 供应商设备封装： | 16-QFN-EP（4x4） |
| 包装： | 管件 |
ISL6210
Absolute Maximum Ratings
Thermal Information
Supply Voltage (PVCC, VCC) . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Thermal Resistance (Notes 1 and 2)
θ JA (°C/W)
θ JC (°C/W)
Input Voltage (V EN , V PWM ) . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
BOOT Voltage (V BOOT-GND ). . . -0.3V to 33V (DC) or 36V (<200ns)
BOOT To PHASE Voltage (V BOOT-PHASE ) . . . . . . -0.3V to 7V (DC)
-0.3V to 9V (<10ns)
PHASE Voltage . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 30V (DC)
GND -8V (<20ns Pulse Width, 10μJ)
UGATE Voltage . . . . . . . . . . . . . . . . V PHASE - 0.3V (DC) to V BOOT
V PHASE - 5V (<20ns Pulse Width, 10μJ) to V BOOT
LGATE Voltage . . . . . . . . . . . . . . . GND - 0.3V (DC) to VCC + 0.3V
GND - 2.5V (<20ns Pulse Width, 5μJ) to VCC + 0.3V
Ambient Temperature Range . . . . . . . . . . . . . . . . . .-40°C to +125°C
QFN Package . . . . . . . . . . . . . . . . . . 46 8.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +100°C
Maximum Operating Junction Temperature. . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
2. θ JC , “case temperature” location is at the center of the package underside exposed pad. See Tech Brief TB379 for details.
Electrical Specifications
These specifications apply for T A = -10°C to +100°C, Unless Otherwise Noted. Parameters with MIN and/or
MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY CURRENT
Bias Supply Current
I VCC
PWM pin floating, V VCC = 5V
-
170
-
μA
POWER-ON RESET
POR Rising
POR Falling
Hysteresis
-
2.6
-
3.4
3.0
400
4.2
-
-
V
V
mV
BOOTSTRAP DIODE
Forward Voltage Drop
V F
V VCC = 5V, forward bias current = 2mA
0.3
0.60
0.7
V
PWM INPUT
Sinking Impedance
Source Impedance
Three-State Rising Threshold
Three-State Falling Threshold
R PWM_SNK
R PWM_SRC
V VCC = 5V
V VCC = 5V
8.0
8.3
1.08
3.4
10.4
10.6
1.3
3.65
15
25
1.5
3.98
k Ω
k Ω
V
V
Three-State Shutdown Holdoff Time
Three-state to UG/LG Rising Propagation
t TSSHD
t PTS
t PDLU or t PDLL + Gate Falling Time
-
-
80
20
-
-
ns
ns
Delay
SWITCHING TIME (See Figure 1)
UGATE Rise Time (Note 4)
LGATE Rise Time (Note 4)
UGATE Fall Time (Note 4)
LGATE Fall Time (Note 4)
UGATE Turn-Off Propagation Delay
LGATE Turn-Off Propagation Delay
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
Minimum LGATE On Time in DCM (Note 4)
t RU
t RL
t FU
t FL
t PDLU
t PDLL
t PDHU
t PDHL
t PDHU
t PDHL
t LGMIN
V VCC = 5V, 3nF Load
V VCC = 5V, 3nF Load
V VCC = 5V, 3nF Load
V VCC = 5V, 3nF Load
V VCC = 5V, Outputs Unloaded
V VCC = 5V, Outputs Unloaded
V VCC = 5V, Outputs Unloaded; R SET = 0 Ω
V VCC = 5V, Outputs Unloaded; R SET = 0 Ω
V VCC = 5V, Outputs Unloaded; R SET = 80k Ω
V VCC = 5V, Outputs Unloaded; R SET = 80k Ω
-
-
-
-
-
-
-
-
-
-
-
8.0
8.0
8.0
4.0
20
27
26
26
41
33
400
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
FN6392.1
December 9, 2008
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