参数资料
型号: ISL6210CRZ
厂商: Intersil
文件页数: 6/10页
文件大小: 0K
描述: IC MOSFET DRIVER DUAL SYNC 16QFN
标准包装: 75
配置: 高端和低端,同步
输入类型: PWM
延迟时间: 26ns
电流 - 峰: 2A
配置数: 2
输出数: 4
高端电压 - 最大(自引导启动): 36V
电源电压: 4.5 V ~ 5.5 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 16-VQFN 裸露焊盘
供应商设备封装: 16-QFN-EP(4x4)
包装: 管件
ISL6210
Timing Diagram
2.5V
PWM
t PDHU
t PDLU
t TSSHD
UGATE
LGATE
1V
t RU
1V
t RL
t PTS
t TSSHD
t RU
t FU
t PTS
t PDLL
t PDHL
t FL
FIGURE 1. TIMING DIAGRAM
Description
Theory of Operation
Designed for speed, the ISL6210 dual MOSFET driver
controls both high-side and low-side N-Channel FETs for two
separate channels of a Multiphase PWM system from two
independent PWM signals.
A rising edge on PWM initiates the turn-off of the lower
MOSFET (see “Timing Diagram” on page 6). After a short
propagation delay [t PDLL ], the lower gate begins to fall.
Typical fall times [t FL ] are provided in the “Electrical
Specifications” table on page 4. Adaptive shoot-through
circuitry monitors the LGATE voltage. When LGATE has
fallen below 1V, UGATE is allowed to turn ON. This prevents
both the lower and upper MOSFETs from conducting
simultaneously, or shoot-through.
A falling transition on PWM indicates the turn-off of the upper
MOSFET and the turn-on of the lower MOSFET. A short
propagation delay [t PDLU ] is encountered before the upper
gate begins to fall [t FU ]. The upper MOSFET gate-to-source
voltage is monitored, and the lower gate is allowed to rise
after the upper MOSFET gate-to-source voltage drops below
1V. The lower gate then rises [t RL ], turning on the lower
MOSFET.
This driver is optimized for converters with large step down
compared to the upper MOSFET because the lower
MOSFET conducts for a much longer time in a switching
period. The lower gate driver is therefore sized much larger
to meet this application requirement.
The 0.5 Ω ON-resistance and 4A sink current capability
enable the lower gate driver to absorb the current injected to
the lower gate through the drain-to-gate capacitor of the
6
lower MOSFET and prevent a shoot through caused by the
high dv/dt of the phase node.
Diode Emulation
Diode emulation allows for higher converter efficiency under
light-load situations. With diode emulation active, the
ISL6210 will detect the zero current crossing of the output
inductor and turn off LGATE. This ensures that
discontinuous conduction mode (DCM) is achieved. Diode
emulation is asynchronous to the PWM signal. Therefore,
the ISL6210 will respond to the FCCM input immediately
after it changes state.
Please note that Intersil does not recommend Diode
Emulation use with r DS(ON) current sensing topologies. The
turn-OFF of the low side MOSFET can cause gross current
measurement inaccuracies.
Three-State PWM Input
A unique feature of the ISL6210 and other Intersil drivers is the
addition of a shutdown window to the PWM input. If the PWM
signal enters and remains within the shutdown window for a set
holdoff time, the output drivers are disabled and both MOSFET
gates are pulled and held low. The shutdown state is removed
when the PWM signal moves outside the shutdown window.
Otherwise, the PWM rising and falling thresholds outlined in the
“Electrical Specifications” table on page 4 determine when the
lower and upper gates are enabled.
Adaptive Shoot-Through Protection
Both drivers incorporate adaptive shoot-through protection
to prevent upper and lower MOSFETs from conducting
simultaneously and shorting the input supply. This is
accomplished by ensuring the falling gate has turned off one
MOSFET before the other is allowed to turn on.
FN6392.1
December 9, 2008
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