参数资料
型号: ISL6217CVZ-T
厂商: Intersil
文件页数: 13/19页
文件大小: 0K
描述: IC CTRLR PWM INTEL PENT 38-TSSOP
标准包装: 2,500
应用: 控制器,Intel Pentium? IMVP-IV,IMVP+
输入电压: 5.5 V ~ 25 V
输出数: 1
工作温度: -10°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-TFSOP(0.173",4.40mm 宽)
供应商设备封装: 38-TSSOP
包装: 带卷 (TR)
ISL6217
current feedback is desired, a discrete Precision Current
Sense Resistor, RPOWER, may be inserted between the
SOURCE of each channel’s lower MOSFET and ground.
The small RISEN resistor, as described above, is then
replaced with a standard 1% resistor and connected from
the ISEN pin of the ISL6217 controller to the SOURCE of
the lower MOSFET.
Battery Feed-Forward Compensation - VBAT
The ISL6217 incorporates Battery Voltage Feed-Forward
Compensation, as shown in Figure 9. This compensation
provides a constant Pulse Width Modulator Gain
independent of battery voltage. An understanding of this
gain is required for proper loop compensation. The Battery
Voltage is connected directly to the ISL6217 by way of the
VBAT pin, and the gain of the system ramp modulator is a
constant 6.0.
Fault Protection
The ISL6217 protects the CPU from damaging stress
levels. The overcurrent trip point is integral in preventing
output shorts of varying degrees from causing current
spikes that would damage a CPU. The output overvoltage
and Undervoltage detection features insure a safe window
of operation for the CPU.
Output Voltage Monitoring
VSEN is connected to the local CORE output voltage and
is used for PGOOD, Under-Voltage and overvoltage
sensing only. (Refer to “Block Diagram”) .
The voltage on VSEN is compared with two voltage levels
which indicate an overvoltage or undervoltage condition of
the output. Violating either of these conditions results in the
PGOOD pin toggling low to indicate a problem with the
output voltage.
C 2
R1
C DCPL
FB
R 2
C 1
COMP
V IN
ERROR
AMPLIFIER
UG1
Q 1
L 01
Σ
Σ
EA+
_
V DROOP R DROOP
+
SOFT
-
+
I DROOP
BALANCE
+ V ERROR1
-
+
+
-
PWM 1
CIRCUIT
COMPARATOR
CURRENT
SENSING
LG1
ISEN1
Q 2
R ISEN1
I L1
PHASE
C SOFT
IMVP-IV_
IMVP-IV+_
REFERENCE
-
I AVERAGE
CURRENT
AVERAGING
V CORE
+ V
-
Σ
+
CURRENT
SENSING
ISEN2
R ISEN2
-
rdson
V IN
C OUT
R LOAD
PHASE
-
-
+ V ERROR2
Σ
BALANCE
+
PWM 2
CIRCUIT
COMPARATOR
UG2
LG2
Q 4
Q 3 L 02
-
V rdson I L2
+
ISL6217
FIGURE 9.
SIMPLIFIED BLOCK DIAGRAM OF THE ISL6217 VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO CHANNEL
REGULATOR. THE 38 LEAD TSSOP PACKAGE IS SHOWN.
13
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