参数资料
型号: ISL6217CVZ-T
厂商: Intersil
文件页数: 5/19页
文件大小: 0K
描述: IC CTRLR PWM INTEL PENT 38-TSSOP
标准包装: 2,500
应用: 控制器,Intel Pentium? IMVP-IV,IMVP+
输入电压: 5.5 V ~ 25 V
输出数: 1
工作温度: -10°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 38-TFSOP(0.173",4.40mm 宽)
供应商设备封装: 38-TSSOP
包装: 带卷 (TR)
ISL6217
Absolute Voltage Ratings
Thermal Information
θ JA ( C/W)
Supply Voltage, VDD, VDDP .....................................-0.3-+7V
Thermal Resistance (Typical, Note 1)
o
Maximum Operating Junction Temperature ..................125 C
Maximum Storage Temperature Range ..........-65 C to 150 C
Maximum Lead Temperature (Soldering 10s) ...............300 C
Battery Voltage, VBAT.................................................... +30V
Boot1,2 and UGATE1,2 .................................................. +35V
Phase1,2 and ISEN1,2 ................................................... +30V
Boot1,2 with respect to Phase1,2 .................................. +6.5V
TSSOP Package (Note 1) ................................................ 72°
o
o o
o
UGATE1,2 ................... (Phase1,2 - 0.3V) to (Boot1,2 + 0.3V)
PHASE 1,2 Voltage.............. GND- 0.3V (DC) to V BOOT + 0.3V
...........GND - 5V (<100ns Pulse Width, 10μJ) to V BOOT + 0.3V
ALL OTHER PINS ............................... -0.3V to (VDD + 0.3V)
Recommended Operating Conditions
Supply Voltage, VDD, VDDP ....................................+5V ±5%
Battery Voltage, VBAT........................................+5.6V to 25V
Ambient Temperature ....................................... -10°C to 85°C
Junction Temperature..................................... -10°C to 125°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and
operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTE:
1)
θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Electrical Specifications
Operating Conditions: VDD = 5V, TA = -10°C to 85°C, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
INPUT POWER SUPPLY
EN = 3.3V, DSEN# = 0, DRSEN = 0, PWRCH = 0
-
1.4
-
mA
Input Supply Current, I(VDD)
POR (Power-On Reset) Threshold
EN = 0V
VDD Rising
VDD Falling
-
4.35
4.05
1
4.45
4.20
-
4.5
4.40
μA
V
V
REFERENCE AND DAC
System Accuracy
DAC (VID0 - VID5) Input Low
Percent system deviation from programmed VID Codes @ 1.356
DAC Programming Input Low Threshold Voltage
-0.8
-
-
-
0.8
0.3
%
V
Voltage
DAC (VID0 - VID5) Input High
DAC Programming Input High Threshold Voltage
0.7
-
-
V
Voltage
Maximum Output Voltage
Minimum Output Voltage
-
-
1.708
0.70
-
-
V
V
CHANNEL GENERATOR
Frequency, FSW
Adjustment Range
RFset = 243K, ±1%
225
0.25
250
-
275
1.0
kHz
MHz
ERROR AMPLIFIER
DC Gain
-
100
-
dB
Gain-Bandwidth Product
Slew Rate
CL = 20pF
CL = 20pF
-
-
18
4.0
-
-
MHz
V/μs
ISEN
Full Scale Input Current
-
32
-
μA
Overcurrent Threshold
Soft Start Current
Droop Current
ROCSET =124K
SOFT = 0V
ISEN = 32μA
-
-
26.5
64
31
28
-
-
29.5
μA
μA
μA
GATE DRIVER
5
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