参数资料
| 型号： | ISL6237IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 28/35页 |
| 文件大小： | 0K |
| 描述： | IC MAIN PWR CTRLR QUAD 32-QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 6,000 |
| 应用： | 控制器，笔记本电脑电源系统 |
| 输入电压： | 5.5 V ~ 25 V |
| 输出数： | 4 |
| 输出电压： | 多重 |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
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ISL6237
V GS ( MIN ) = PVCC ? ---------------------------------------
C BOOT
MOSFET Gate Drivers (UGATE_, LGATE_)
The UGATE_ and LGATE_ gate drivers sink 2.0A and 3.3A
respectively of gate drive, ensuring robust gate drive for
high-current applications. The UGATE_ floating high-side
MOSFET drivers are powered by diode-capacitor charge
pumps at BOOT_. The LGATE_ synchronous-rectifier
drivers are powered by PVCC.
The internal pull-down transistors that drive LGATE_ low
have a 0.6 Ω typical on-resistance. These low on-resistance
pull-down transistors prevent LGATE_ from being pulled up
during the fast rise time of the inductor nodes due to
capacitive coupling from the drain to the gate of the low-side
synchronous-rectifier MOSFETs. However, for high-current
applications, some combinations of high- and low-side
MOSFETs may cause excessive gate-drain coupling, which
leads to poor efficiency and EMI-producing shoot-through
currents. Adding a 1 Ω resistor in series with BOOT_
increases the turn-on time of the high-side MOSFETs at the
expense of efficiency, without degrading the turn-off time
(Figure 71).
Adaptive dead-time circuits monitor the LGATE_ and
UGATE_ drivers and prevent either FET from turning on until
the other is fully off. This algorithm allows operation without
shoot-through with a wide range of MOSFETs, minimizing
delays and maintaining efficiency. There must be low
resistance, low-inductance paths from the gate drivers to the
MOSFET gates for the adaptive dead-time circuit to work
properly. Otherwise, the sense circuitry interprets the
MOSFET gate as "off" when there is actually charge left on
the gate. Use very short, wide traces measuring 10 to 20
squares (50 mils to 100 mils wide if the MOSFET is 1” from
the device).
5V
maximum operating duty cycle (this occurs at minimum input
voltage). The minimum gate to source voltage (V GS(MIN) ) is
determined by:
(EQ. 4)
C BOOT + C GS
where:
? PVCC is 5V
? C GS is the gate capacitance of the high-side MOSFET
Boost-Supply Refresh Monitor
In pure skip mode, the converter frequency can be very low
with little to no output loading. This produces very long off
times, where leakage can bleed down the BOOT capacitor
voltage. If the voltage falls too low, the converter may not be
able to turn on UGATE when the output voltage falls to the
reference. To prevent this, the ISL6237 monitors the BOOT
capacitor voltage, and if it falls below 3V, it initiates an
LGATE pulse, which will refresh the BOOT voltage.
POR, UVLO, and Internal Digital Soft-Start
Power-on reset (POR) occurs when VIN rises above
approximately 3V, resetting the undervoltage, overvoltage,
and thermal-shutdown fault latches. PVCC
undervoltage-lockout (UVLO) circuitry inhibits switching
when PVCC is below 4V. LGATE_ is low during UVLO. The
output voltages begin to ramp up once PVCC exceeds its 4V
UVLO and REF is in regulation. The internal digital soft-start
timer begins to ramp up the maximum-allowed current limit
during start-up. The 1.7ms ramp occurs in five steps. The
step size are 20%, 40%, 60%, 80% and 100% of the positive
current limit value.
Power-Good Output (POK_)
BOOT_
1 0 Ω
VIN
The POK_ comparator continuously monitors both output
voltages for undervoltage conditions. POK_ is actively held
low in shutdown, standby, and soft-start. POK1 releases and
UGATE_
C BOOT
Q1
OUT_
digital soft-start terminates when VOUT1 outputs reach the
error-comparator threshold. POK1 goes low if VOUT1 output
turns off or is 10% below its nominal regulation point. POK1
PHASE_
ISL6237
ISL88734
FIGURE 71. REDUCING THE SWITCHING-NODE RISE TIME
Boost-Supply Capacitor Selection (Buck)
The boost capacitor should be 0.1μF to 4.7μF, depending on
the input and output voltages, external components, and PC
board layout. The boost capacitance should be as large as
possible to prevent it from charging to excessive voltage, but
small enough to adequately charge during the minimum
low-side MOSFET conduction time, which happens at
28
is a true open-drain output. Likewise, POK2 is used to
monitor VOUT2.
Fault Protection
The ISL6237 provides overvoltage/undervoltage fault
protection in the buck controllers. Once activated, the
controller continuously monitors the output for undervoltage
and overvoltage fault conditions.
OVERVOLTAGE PROTECTION
When the output voltage of VOUT1 is 11% (16% for VOUT2)
above the set voltage, the overvoltage fault protection
activates. This latches on the synchronous rectifier MOSFET
with 100% duty cycle, rapidly discharging the output
capacitor until the negative current limit is achieved. Once
FN6418.4
March 18, 2008
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