参数资料
型号: ISL6261EVAL1Z
厂商: Intersil
文件页数: 21/34页
文件大小: 0K
描述: EVAL BOARD FOR ISL6261 1 QFN
标准包装: 1
系列: *
ISL6261
Solving for Cn yields
The user can choose the actual resistor and capacitor values
C n = DCR
L
R n × R s
R n + R s
(EQ. 26)
based on the recommendation and input them in the
spreadsheet, then see the actual loop gain curves and the
regulator output impedance curve.
Caution needs to be used in choosing the input resistor to
the FB pin. Excessively high resistance will cause an error to
For example: L = 0.45 μ H, DCR = 1.1m Ω , R s = 7.68k Ω , and
R n = 3.4k Ω
the output voltage regulation due to the bias current flowing
in the FB pin. It is recommended to keep this resistor below
3k.
C n =
0.45 μ H
0 . 0011
parallel ( 7 . 68 k , 3 . 4 k )
= 174 nF
(EQ. 27)
Droop using Discrete Resistor Sensing -
Static/Dynamic Mode of Operation
Figure 3 shows a detailed schematic using discrete resistor
Since the inductance and the DCR typically have 20% and
7% tolerance respectively, the L/DCR time constant of each
individual inductor may not perfectly match the RC time
constant of the current sensing network. In mass production,
this effect will make the transient response vary a little bit
from board to board. Compared with potential long-term
damage on CPU reliability, an immediate system failure is
worse. So it is desirable to avoid the waveforms shown in
Figure 11. It is recommended to choose the minimum C n
value based on the maximum inductance so only the
scenarios of Figures 10 and 12 may happen. It should be
noted that, after calculation, fine-tuning of C n value may still
be needed to account for board parasitics. C n also needs to
sensing of the inductor current. Figure 14 shows the
equivalent circuit. Since the current sensing resistor voltage
represents the actual inductor current information, R s and C n
simply provide noise filtering. The most significant noise
comes from the ESL of the current sensing resistor. A low
low ESL sensing resistor is strongly recommended. The
recommended R s is 100 Ω and the recommended C n is
220pF. Since the current sensing resistance does not
appreciably change with temperature, the NTC network is
not needed for thermal compensation.
Droop is designed the same way as the DCR sensing
approach. The voltage on the current sensing resistor is
given by the following equation:
be a high-grade cap like X7R with low tolerance. Another
good option is the NPO/COG (class-I) capacitor, featuring
V rsen = R sen ? I o
(EQ. 28)
R droop = R sen ? ? 1 +
?
?
R drp 1 ? ?
only 5% tolerance and very good thermal characteristics. But
the NPO/COG caps are only available in small capacitance
values. In order to use such capacitors, the resistors and
thermistors surrounding the droop voltage sensing and
droop amplifier need to be scaled up 10X to reduce the
capacitance by 10X. Attention needs to be paid in balancing
the impedance of droop amplifier.
Equation 21shows the droop amplifier gain. So the actual
droop is given by
? R drp 2 ?
(EQ. 29)
?
Solving for R drp2 yields:
R drp 2 = R drp 1 ? ? ?
? 1 ? ?
Dynamic Mode of Operation - Compensation
Parameters
The voltage regulator is equivalent to a voltage source equal
? R droop
? R sen
?
?
(EQ. 30)
to VID in series with the output impedance. The output
impedance needs to be 2.1m Ω in order to achieve the
2.1mV/A load line. It is highly recommended to design the
compensation such that the regulator output impedance is
2.1m Ω . A type-III compensator is recommended to achieve
the best performance. Intersil provides a spreadsheet to
design the compensator parameters. Figure 13 shows an
example of the spreadsheet. After the user inputs the
parameters in the blue font, the spreadsheet will calculate
the recommended compensator parameters (in the pink
font), and show the loop gain curves and the regulator output
impedance curve. The loop gain curves need to be stable for
regulator stability, and the impedance curve needs to be
equal to or smaller than 2.1m Ω in the entire frequency range
to achieve good transient response.
21
For example: R droop = 2.1m Ω . If R sen = 1m and R drp1 = 1k,
easy calculation gives that R drp2 is 1.1k.
The current sensing traces should be routed directly to the
current sensing resistor pads for accurate measurement.
However, due to layout imperfections, the calculated R drp2
may still need slight adjustment to achieve optimum load line
slope. It is recommended to adjust R drp2 after the system
has achieved thermal equilibrium at full load.
FN9251.1
September 27, 2006
相关PDF资料
PDF描述
ISL6271AEVAL1 EVALUATION BOARD FOR ISL6271A
ISL62882CEVAL2Z EVAL BOARD FOR ISL62882C
ISL62883CEVAL2Z EVAL BOARD FOR ISL62883C
ISL62883EVAL2Z EVALUATION BOARD FOR ISL62883
ISL62884CEVAL2Z EVAL BOARD FOR ISL62884C
相关代理商/技术参数
参数描述
ISL6261IR7Z 功能描述:IC DC/DC BUCK CTRLR 1PH 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源,ICERA E400,E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA,WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR)
ISL6261IR7Z-T 功能描述:IC DC/DC BUCK CTRLR 1PH 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器,Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN(7x7) 包装:管件
ISL6261IRZ 功能描述:IC DC/DC BUCK CTRLR 1PH 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源,ICERA E400,E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA,WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR)
ISL6261IRZ-T 功能描述:IC DC/DC BUCK CTRLR 1PH 40-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器,Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN(7x7) 包装:管件
ISL6262A 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Two-Phase Core Controller Santa Rosa, IMVP-6