参数资料
型号: ISL6261EVAL1Z
厂商: Intersil
文件页数: 6/34页
文件大小: 0K
描述: EVAL BOARD FOR ISL6261 1 QFN
标准包装: 1
系列: *
ISL6261
Functional Pin Description
40
39
38
37
36
35
34
33
32
31
FDE
PGD_IN
RBIAS
VR_TT#
1
2
3
4
30 VID2
29 VID1
28 VID0
27 VCCP
NTC
SOFT
OCSET
VW
COMP
FB
5
6
7
8
9
10
GND PAD
(BOTTOM)
26 LGATE
25 VSSP
24 PHASE
23 UGATE
22 BOOT
21 NC
11
12
13
14
15
16
17
18
19
20
FDE
Forced diode emulation enable signal. Logic high of FDE
with logic low of DPRSTP# forces the ISL6261 to operate in
diode emulation mode with an increased VW-COMP voltage
window.
PGD_IN
Digital Input. Suggest connecting to MCH_PWRGD, which
indicates that VCC_MCH voltage is within regulation.
RBIAS
A 147K resistor to VSS sets internal current reference.
VR_TT#
Thermal overload output indicator with open-drain output.
Over-temperature pull-down resistance is 10.
NTC
Thermistor input to VR_TT# circuit and a 60μA current
source is connected internally to this pin.
SOFT
A capacitor from this pin to GND pin sets the maximum slew
rate of the output voltage. The SOFT pin is the non-inverting
input of the error amplifier.
OCSET
Overcurrent set input. A resistor from this pin to VO sets
DROOP voltage limit for OC trip. A 10μA current source is
connected internally to this pin.
6
VW
A resistor from this pin to COMP programs the switching
frequency (eg. 6.81K = 300kHz).
COMP
The output of the error amplifier.
FB
The inverting input of the error amplifier.
VDIFF
The output of the differential amplifier.
VSEN
Remote core voltage sense input.
RTN
Remote core voltage sense return.
DROOP
The output of the droop amplifier. DROOP-VO voltage is the
droop voltage.
DFB
The inverting input of the droop amplifier.
VO
An input to the IC that reports the local output voltage.
FN9251.1
September 27, 2006
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