参数资料
型号: ISL6266HRZ
厂商: Intersil
文件页数: 26/30页
文件大小: 0K
描述: IC CORE CTRLR 2PHASE 48-QFN
标准包装: 43
应用: 转换器,Intel IMVP-6
输入电压: 5 V ~ 25 V
输出数: 1
输出电压: 0.3 V ~ 1.5 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN(7x7)
包装: 管件
ISL6266, ISL6266A
R O is typically 1 Ω to 10 Ω . This resistor is used to tie the
outputs of all channels together and thus create a summed
The non-inverting droop amplifier circuit has the gain
K droopamp expressed as Equation 25:
k droopamp = 1 + ----------------
average of the local CORE voltage output. R S is determined
through an understanding of both the DC and transient load
currents. This value will be covered in the next section.
R drp2
R drp1
(EQ. 25)
However, it is important to keep in mind that the outputs of
each of these R S resistors are tied together to create the
VSUM voltage node. With both the outputs of R O and R S
G 1target is the desired gain of Vn over I OUT ? DCR/2.
Therefore, the temperature characteristics of gain of Vn is
described by Equation 26.
G 1 ( T ) = -------------------------------------------------------
tied together, the simplified model for the droop circuit can
be derived. This is presented in Figure 40.
G 1t arg et
( 1 + 0.00393*(T-25) )
(EQ. 26)
I OUT ? DCR
V DCR_EQU = ---------------------------------
Figure 40 shows the simplified model of the droop circuitry.
Essentially, one resistor can replace the R O resistors of each
phase and one R S resistor can replace the R S resistors of
each phase. The total DCR drop due to load current can be
replaced by a DC source, the value of which is given by
Equation 19:
(EQ. 19)
2
For the convenience of analysis, the NTC network
comprised of R ntc , R series and R par , given in Figure 37, is
labeled as a single resistor R N in Figure 40.
The first step in droop load line compensation is to adjust
R N , RO EQV and RS EQV such that sufficient droop voltage
For the G 1target = 0.76:
R ntc = 10k Ω with b = 4300,
R series = 2610 Ω , and
R par = 11k Ω
RS EQV = 1825 Ω generates a desired G1, close to the
feature specified in Equation 26.
The actual G1 at +25°C is 0.769. A design file is available to
generate the proper values of R ntc , R series , R par , and
RS EQV for values of the NTC thermistor and G1 that differ
from the example provided here.
The individual resistors from each phase to the VSUM node,
labeled R S1 and R S2 in Figure 37, are then given by
Equation 27.
exists even at light loads between the VSUM and VO' nodes.
As a rule of thumb, we start with the voltage drop across the
Rs = 2 ? RS EQV
(EQ. 27)
R n ( T ) = --------------------------------------------------------------
( R series + R ntc ) ? R par
R n ( T )
R n ( T ) + RS EQV
R drp2 = ? ----------------------------------------------- – 1 ? ? R drp1
2 ? R droop
? DCR ? G1 ( 25 ° C )
?
R drp2 = ? --------------------------------------- – 1 ? ? 1k Ω ≈ 5.82k Ω
2 ? R droop
? 0.0008 ? 0.769
?
R N network, Vn, to be 0.5x to 0.8x V DCR_EQU . This ratio
provides for a fairly reasonable amount of light load signal
from which to arrive at droop.
The resultant NTC network resistor value is dependent on
the temperature and given by Equation 20.
(EQ. 20)
R series + R ntc + R par
For simplicity, the gain of Vn to the V DCR_EQU is defined by
G1, also dependent on the temperature of the NTC
thermistor.
Δ
G 1 ( T ) = ------------------------------------------- (EQ. 21)
So, R S = 3650 Ω . Once we know the attenuation of the R S
and R N network, we can then determine the droop amplifier
gain required to achieve the load line. Setting
R drp1 = 1k_1%, then R drp2 can be found using Equation 28.
(EQ. 28)
Droop Impedance (R droop ) = 0.0021 (V/A) as per the Intel
IMVP-6+ specification. Using DCR = 0.0008 Ω typical for a
0.36μH inductor, R drp1 = 1k Ω and the attenuation gain
(G1) = 0.77, R drp2 is then given by Equation 29:
(EQ. 29)
DCR ( T ) = DCR 25 ° C ? ( 1 + 0.00393*(T-25) )
(EQ. 22)
Note, we choose to ignore the R O resistors because they do
not add significant error.
R droop = G 1 ( T ) ? ------------------- ? ( 1 + 0.00393*(T-25) ) ? k droopamp
G 1 ( T ) ? ( 1 + 0.00393*(T-25) ) ? G 1t arg et
Therefore, the output of the droop amplifier divided by the
total load current can be expressed as shown in
Equation 23, where R droop is the realized load line slope
and 0.00393 is the temperature coefficient of the copper.
DCR 25
2
(EQ. 23)
How to achieve the droop value independent of the inductor
temperature is expressed by Equation 24.
(EQ. 24)
26
These designed values in R n network are very sensitive to
the layout and coupling factor of the NTC to the inductor. As
only one NTC is required in this application, this NTC should
be placed as close to the Channel 1 inductor as possible and
PCB traces sensing the inductor voltage should route
directly to the inductor pads.
Due to layout parasitics, small adjustments may be
necessary to accurately achieve the full load droop voltage.
This can be easily accomplished by allowing the system to
achieve thermal equilibrium at full load, and then adjusting
R drp2 to obtain the appropriate load line slope.
FN6398.3
June 14, 2010
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