参数资料
| 型号： | ISL6266HRZ |
| 厂商： | Intersil |
| 文件页数： | 8/30页 |
| 文件大小： | 0K |
| 描述： | IC CORE CTRLR 2PHASE 48-QFN |
| 标准包装： | 43 |
| 应用： | 转换器，Intel IMVP-6 |
| 输入电压： | 5 V ~ 25 V |
| 输出数： | 1 |
| 输出电压： | 0.3 V ~ 1.5 V |
| 工作温度： | -10°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（7x7） |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页
ISL6266, ISL6266A
PGOOD - Power good open-drain output. Connect
externally with 680 Ω to VCCP or 1.9k Ω to 3.3V.
PSI# - Current indicator input. When asserted low, indicates
a reduced load-current condition and initiates single-phase
operation.
PMON - Analog output. PMON is proportional to the product
of Vsen and droop voltage.
RBIAS - 147k Ω resistor to VSS sets internal current
reference.
VR_TT# - Thermal overload output indicator with open-drain
output. Over-temperature pull-down resistance is 10 Ω .
NTC - Thermistor input to VRTT# circuit and a 60μA current
source is connected internally to this pin.
SOFT - A capacitor from this pin to GND sets the maximum
slew rate of the output voltage. SOFT is the non-inverting
input of the error amplifier.
OCSET - Overcurrent set input. A resistor from this pin to
VO sets DROOP voltage limit for OC trip. A 10μA current
source is connected internally to this pin.
VW - A resistor from this pin to COMP programs the
switching frequency (for example, 6.45k Ω ? 400kHz).
COMP - This pin is the output of the error amplifier.
FB - This pin is the inverting input of error amplifier.
FB2 - There is a switch between FB2 pin and the FB pin.
The switch is closed in single-phase operation and is
opened in two phase operation. The components connecting
to FB2 are to adjust the compensation in single phase
operation to achieve optimum performance.
VDIFF - This pin is the output of the differential amplifier.
VSEN - Remote core voltage sense input.
RTN - Remote core voltage sense return.
DROOP - Output of the droop amplifier. The voltage level on
this pin is the sum of V O and the droop voltage.
DFB - Inverting input to droop amplifier.
VO - An input to the IC that reports the local output voltage.
VSUM - This pin is connected to the summation junction of
channel current sensing.
VIN - Battery supply voltage. It is used for input voltage feed
forward to improve input line transient performance.
VSS - Signal ground. Connect to local controller ground.
VDD - 5V control power supply.
ISEN2 - Individual current sharing sensing for Channel 2.
ISEN1 - Individual current sharing sensing for Channel 1.
8
N/C - Not connected. Grounding this pin to signal ground in
the practical layout.
BOOT2 - This pin is the upper gate driver supply voltage for
Phase 2. An internal boot strap diode is connected to the
PVCC pin.
UGATE2 - Upper MOSFET gate signal for Phase 2.
PHASE2 - The phase node of Phase 2. Connect this pin to
the source of the Channel 2 upper MOSFET.
PGND2 - The return path of the lower gate driver for
Phase 2.
LGATE2 - Lower-side MOSFET gate signal for Phase 2.
PVCC - 5V power supply for gate drivers.
LGATE1 - Lower-side MOSFET gate signal for Phase 1.
PGND1 - The return path of the lower gate driver for
Phase 1.
PHASE1 - The phase node of phase 1. Connect this pin to
the source of the Channel 1 upper MOSFET.
UGATE1 - Upper MOSFET gate signal for Phase 1.
BOOT1 - This pin is the upper-gate-driver supply voltage for
Phase 1. An internal boot strap diode is connected to the
PVCC pin.
VID0, VID1, VID2, VID3, VID4, VID5, VID6 - VID input with
VID0 is the least significant bit (LSB) and VID6 is the most
significant bit (MSB).
VR_ON - Digital enable input. A logic high signal on this pin
enables the regulator.
DPRSLPVR - Deeper sleep enable signal. A logic high
signal on this pin indicates the micro-processor is in
deeper-sleep mode and also indicates a slow C4 entry or
exit rate with 41μA discharging or charging the SOFT
capacitor.
DPRSTP# - Deeper sleep slow wake up signal. A logic low
signal on this pin indicates the micro-processor is in
deeper-sleep mode.
CLK_EN# - Digital output for system clock. Goes active
10μs after V CORE is within 10% of Boot voltage.
3V3 - 3.3V supply voltage for CLK_EN#.
FN6398.3
June 14, 2010
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6266HRZ-T | 功能描述:IC CORE CTRLR 2PHASE 48-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6267 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiphase PWM Regulator for AMD Fusion Mobile CPUs |
| ISL6267EVAL1Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiphase PWM Regulator for AMD Fusion Mobile CPUs |
| ISL6267HRZ | 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLR FOR AMD FUSION UP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6267HRZ-T | 功能描述:电流型 PWM 控制器 MULTI-OUTPUT CNTRLR FOR AMD FUSION UP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
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