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参数资料
| 型号： | ISL6268EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 13/14页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL6268 |
| 标准包装： | 1 |
| 系列： | Robust Ripple Regulator™ (R³) |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.2V |
| 电流 - 输出： | 5A |
| 输入电压： | 7 ~ 25 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6268 |
ISL6268
EN (Pin 5), and PGOOD (Pin 2)
These are logic inputs that are referenced to the GND pin.
Treat as a typical logic signal.
COMP (Pin 6), FB (Pin 7), and VO (Pin 10)
For best results, use an isolated sense line from the output
load to the VO pin. The input impedance of the FB pin is
high, so place the voltage programming and loop
compensation components close to the VO, FB, and GND
pins keeping the high impedance trace short.
FSET (Pin 9)
This pin requires a quiet environment. The resistor R FSET
and capacitor C FSET should be placed directly adjacent to
this pin. Keep fast moving nodes away from this pin.
ISEN (Pin 11)
Route the connection to the ISEN pin away from the traces
and components connected to the FB pin, COMP pin, and
FSET pin.
13
LG (Pin 13)
The signal going through this trace is both high dv/dt and
high di/dt, with high peak charging and discharging current.
Route this trace in parallel with the trace from the PGND pin.
These two traces should be short, wide, and away from
other traces. There should be no other weak signal traces in
proximity with these traces on any layer.
BOOT (Pin 15), UG (Pin 16), and PHASE (Pin 1)
The signals going through these traces are both high dv/dt
and high di/dt, with high peak charging and discharging
current. Route the UG and PHASE pins in parallel with short
and wide traces. There should be no other weak signal
traces in proximity with these traces on any layer.
Copper Size for the Phase Node
The parasitic capacitance and parasitic inductance of the
phase node should be kept very low to minimize ringing. It is
best to limit the size of the PHASE node copper in strict
accordance with the current and thermal management of the
application. An MLCC should be connected directly across
the drain of the upper MOSFET and the source of the lower
MOSFET to suppress the turn-off voltage spike.
FN6348.0
August 22, 2006
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相关代理商/技术参数 |
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| ISL6269 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller with Audio-Frequency Clamp |
| ISL6269_06 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller with Bias Regulator and Audio-Frequency Clamp |
| ISL6269A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller |
| ISL6269ACRZ | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6269ACRZ-T | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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