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参数资料
| 型号： | ISL6268EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 6/14页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL6268 |
| 标准包装： | 1 |
| 系列： | Robust Ripple Regulator™ (R³) |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.2V |
| 电流 - 输出： | 5A |
| 输入电压： | 7 ~ 25 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL6268 |
ISL6268
Functional Pin Descriptions
PHASE (Pin 1)
The PHASE pin detects the voltage polarity of the PHASE
node and is also the current return path for the UG high-side
MOSFET gate driver. Connect the PHASE pin to the node
consisting of the high-side MOSFET source, the low-side
MOSFET drain, and the output inductor.
PGOOD (Pin 2)
The PGOOD pin is an open-drain output that indicates when
the converter is able to supply regulated voltage. Connect
the PGOOD pin to +5V through a pull-up resistor.
VIN (Pin 3)
The VIN pin measures the converter input voltage which is a
required input to the R 3 PWM modulator. Connect across
the drain of the high-side MOSFET to the GND pin.
VCC (Pin 4)
The VCC pin is the input bias voltage for the IC. Connect
+5V from the VCC pin to the GND pin. Decouple with at least
1μF of a MLCC capacitor from the VCC pin to the GND pin.
EN (Pin 5)
The EN pin is the on/off switch of the IC. The soft-start
sequence begins when the EN pin is pulled above the rising
threshold voltage V ENTHR and VCC is above the power-on
reset (POR) rising threshold voltage VVCC_THR . When the
EN pin is pulled below the falling threshold voltage V ENTHF ,
PWM immediately stops.
COMP (Pin 6)
The COMP pin is the output of the control-loop error
amplifier. Compensation components for the control-loop
connect across the COMP and FB pins.
FB (Pin 7)
The FB pin is the inverting input of the control-loop error
amplifier. The converter output voltage regulates to 600mV
from the FB pin to the GND pin. Program the desired output
voltage with a resistor network connected across the VO,
FB, and GND pins. Select the resistor values such that FB to
GND is 600mV when the converter output voltage is at the
programmed regulation value.
GND (Pin 8)
Signal common of the IC. Unless otherwise stated, signals
are referenced to the GND pin, not the PGND pin.
FSET (Pin 9)
The FSET pin programs the PWM switching frequency.
Program the desired PWM frequency with a resistor and a
capacitor connected across the FSET and GND pins.
6
VO (Pin 10)
The VO pin measures the converter output voltage and is
used exclusively as an input to the R 3 PWM modulator.
Connect at the physical location where the best output
voltage regulation is desired.
ISEN (Pin 11)
The ISEN pin programs the threshold of the OCP
overcurrent fault protection. Program the desired OCP
threshold with a resistor connected across the ISEN and
PHASE pins. The OCP threshold is programmed to detect
the peak current of the output inductor. The peak current is
the sum of the DC and AC components of the inductor
current.
PGND (Pin 12)
The PGND pin conducts the turn-off transient current
through the LG gate driver. The PGND pin must be
connected to complete the pull-down circuit of the LG gate
driver. The PGND pin should be connected to the source of
the low-side MOSFET through a low impedance path,
preferably in parallel with the trace connecting the LG pin to
the gate of the low-side MOSFET. The adaptive
shoot-through protection circuit measures the low-side
MOSFET gate-source voltage from the LG pin to the PGND
pin.
LG (Pin 13)
The LG pin is the output of the low-side MOSFET gate
driver. Connect to the gate of the low-side MOSFET.
PVCC (Pin 14)
The PVCC pin is the input voltage bias for the LG low-side
MOSFET gate driver. Connect +5V from the PVCC pin to the
PGND pin. Decouple with at least 1μF of an MLCC capacitor
across the PVCC and PGND pins.
BOOT (Pin 15)
The BOOT pin stores the input voltage for the UG high-side
MOSFET gate driver. Connect an MLCC capacitor across
the BOOT and PHASE pins. The boot capacitor is charged
through an internal boot diode connected from the PVCC pin
to the BOOT pin, each time the PHASE pin drops below
PVCC minus the voltage dropped across the internal boot
diode.
UG (Pin 16)
The UG pin is the output of the high-side MOSFET gate
driver. Connect to the gate of the high-side MOSFET.
FN6348.0
August 22, 2006
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6269 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller with Audio-Frequency Clamp |
| ISL6269_06 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller with Bias Regulator and Audio-Frequency Clamp |
| ISL6269A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Performance Notebook PWM Controller |
| ISL6269ACRZ | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6269ACRZ-T | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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