参数资料
型号: ISL6269IRZ
厂商: Intersil
文件页数: 10/14页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 16-QFN
标准包装: 75
系列: Robust Ripple Regulator™ (R³)
PWM 型: 控制器
输出数: 1
频率 - 最大: 600kHz
电源电压: 7 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 100°C
封装/外壳: 16-VQFN 裸露焊盘
包装: 管件
ISL6269
Programming the Output Voltage
When the converter is in regulation there will be 600mV from
the FB pin to the GND pin. Connect a two-resistor voltage
R2
C2
C1
divider across the VO pin and the GND pin with the output
node connected to the FB pin. Scale the voltage-divider
network such that the FB pin is 600mV with respect to the
GND pin when the converter is regulating at the desired
output voltage. The output voltage can be programmed from
COMP
-
FB
R1
600mV to 3.3V.
Programming the output voltage is written as:
EA
+
R TOP + R BOTTOM
R BOTTOM
V REF = V OUT ? ---------------------------------------------------
Where:
(EQ. 5)
REF
FSET
- V OUT is the desired output voltage of the converter
- V REF is the voltage that the converter regulates to
between the FB pin and the GND pin
- R TOP is the voltage-programming resistor that connects
from the FB pin to the VO pin. In addition to setting the
output voltage, this resistor is part of the loop
compensation network
- R BOTTOM is the voltage-programming resistor that
connects from the FB pin to the GND pin
R 3 MODULATOR
VO
R FSET
V OUT
C FSET
Beginning with R TOP between 1k Ω to 5k Ω, calculating
R BOTTOM is written as:
VIN
VIN
R BOTTOM = -------------------------------------
V REF ? R TOP
V OUT – V REF
(EQ. 6)
UG
Q HIGH_SIDE
Programming the PWM Switching Frequency
PHASE
The ISL6269 does not use a clock signal to produce PWM.
The PWM switching frequency f SW is programmed by the
L OUT
DCR
resistor R FSET that is connected from the FSET pin to the
GND pin. The approximate PWM switching frequency is
GATE DRIVERS
Q LOW_SIDE
C OUT
f SW = ---------------------------
written as:
1
K ? R FSET
(EQ. 7)
LG
GND
C ESR
R FSET = ------------------
Estimating the value of R FSET is written as:
1
K ? f SW
Where:
(EQ. 8)
ISL6269
FIGURE 6. COMPENSATION REFERENCE CIRCUIT
R FSET is the f SW programming resistor
- f SW is the PWM switching frequency
-
- K = 75 x 10 -12
It is recommended that whenever the control loop
compensation network is modified, f SW should be checked
for the correct frequency and if necessary, adjust R FSET .
Compensation Design
The LC output filter has a double pole at its resonant frequency
that causes the phase to abruptly roll downward. The R 3
modulator used in the ISL6269 makes the LC output filter
resemble a first order system in which the closed loop stability
can be achieved with a Type II compensation network.
10
Your local Intersil representative can provide a PC-based
tool that can be used to calculate compensation network
component values and help simulate the loop frequency
response. The compensation network consists of the internal
error amplifier of the ISL6269 and the external components R1,
R2, C1, and C2 as well as the frequency setting components
R FSET , and C FSET, are identified in the schematic Figure 6.
General Application Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a single-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
FN9177.3
June 25, 2009
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