参数资料
| 型号： | ISL6269IRZ |
| 厂商： | Intersil |
| 文件页数： | 6/14页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-QFN |
| 标准包装： | 75 |
| 系列： | Robust Ripple Regulator™ (R³) |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 电源电压： | 7 V ~ 25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 包装： | 管件 |
ISL6269
Electrical Specifications
These specifications apply for T A = -40°C to +100°C, unless otherwise stated. All typical specifications T A = +25°C,
PVCC = 5V, VIN = 15V. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not production tested. (Continued)
PARAMETER
FCCM Leakage
SYMBOL
I FCCML
I FCCMH
FCCM = 0V
FCCM = 5.0V
TEST CONDITIONS
MIN
-
-
TYP
0.1
2.0
MAX
1.0
-
UNIT
μA
μA
PROTECTION
ISEN OCP Threshold
ISEN Short-Circuit Threshold
UVP Threshold
OVP Rising Threshold
OVP Falling Threshold
OTP Rising Threshold
OTP Hysteresis
I OC
I SC
V UV
V OVR
V OVF
T OTR
T OTHYS
ISEN sourcing, T A = -10°C to +100°C
ISEN sourcing
ISEN sourcing
19
17
-
81
113
100
-
-
26
26
50
84
116
103
150
25
33
33
-
87
119
106
-
-
μA
μA
μA
%
%
%
°C
°C
Functional Pin Descriptions
VIN (Pin 1)
The VIN pin measures the converter input voltage which is a
required input to the R 3 PWM modulator. The VIN pin is also
the input source for the integrated +5V LDO regulator.
Connect across the drain of the high-side MOSFET to the
GND pin.
VCC (Pin 2)
The VCC pin is the output of the integrated +5V LDO
regulator, which provides the bias voltage for the IC. The
VCC pin delivers regulated +5V whenever the EN pin is
pulled above V ENTHR . For best performance the LDO
requires at least a 1μF MLCC decouple capacitor to the
GND pin.
FCCM (Pin 3)
The FCCM pin configures the controller to operate in forced-
continuous-conduction-mode (FCCM) or diode-emulation-
mode (DEM). DEM is disabled when the FCCM pin is pulled
above the rising threshold voltage V FCCMTHR , conversely
DEM is enabled when the FCCM pin is pulled below the
falling threshold voltage V FCCMTHF.
EN (Pin 4)
The EN pin is the on/off switch of the IC. When the EN pin is
pulled above the rising threshold voltage V ENTHR , the VCC
5V LDO ramps and begins regulating. The soft-start
sequence begins after VVCC is above the power-on reset
(POR) rising threshold voltage VVCC_THR . When the EN pin
is pulled below the falling threshold voltage V ENTHF , PWM
immediately stops and VVCC decays below the POR falling
threshold voltage VVCC_THF , at which time the IC turns off.
COMP (Pin 5)
The COMP pin is the output of the control-loop error
amplifier. Compensation components for the control-loop
connect across the COMP and FB pins.
6
FB (Pin 6)
The FB pin is the inverting input of the control-loop error
amplifier. The converter output voltage regulates to 600mV
from the FB pin to the GND pin. Program the desired output
voltage with a resistor network connected across the VO,
FB, and GND pins. Select the resistor values such that FB to
GND is 600mV when the converter output voltage is at the
programmed regulation value.
FSET (Pin 7)
The FSET pin programs the PWM switching frequency.
Program the desired PWM frequency with a resistor and a
capacitor connected across the FSET and GND pins.
VO (Pin 8)
The VO pin measures the converter output voltage and is
used exclusively as an input to the R 3 PWM modulator.
Connect at the physical location where the best output
voltage regulation is desired.
ISEN (Pin 9)
The ISEN pin programs the threshold of the OCP
overcurrent fault protection. Program the desired OCP
threshold with a resistor connected across the ISEN and
PHASE pins. The OCP threshold is programmed to detect
the peak current of the output inductor. The peak current is
the sum of the DC and AC components of the inductor
current.
PGND (Pin 10)
The PGND pin conducts the turn-off transient current
through the LG gate driver. The PGND pin must be
connected to complete the pull-down circuit of the LG gate
driver. The PGND pin should be connected to the source of
the low-side MOSFET through a low impedance path,
preferably in parallel with the trace connecting the LG pin to
the gate of the low-side MOSFET. The adaptive shoot-
through protection circuit, measures the low-side MOSFET
gate-source voltage from the LG pin to the PGND pin.
FN9177.3
June 25, 2009
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