参数资料
| 型号： | ISL6269IRZ |
| 厂商： | Intersil |
| 文件页数： | 8/14页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-QFN |
| 标准包装： | 75 |
| 系列： | Robust Ripple Regulator™ (R³) |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 电源电压： | 7 V ~ 25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 包装： | 管件 |
ISL6269
desired regulation voltage. When the EN pin is pulled above
the rising EN threshold voltage V ENTHR and V VCC has
ramped above the rising POR V VCC_THR threshold voltage,
the PGOOD Soft-Start Delay t SS starts and the output voltage
begins to rise. The output voltage enters regulation in
approximately 1.5ms and the PGOOD pin goes to high
impedance once t SS has elapsed.
the opposite gate-driver output has fallen below
approximately 1V. The dead-time shown in Figure 5 is
extended by the additional period that the falling gate voltage
stays above the 1V threshold. The high-side gate-driver
output voltage is measured across the UG and PHASE pins
while the low-side gate-driver output voltage is measured
across the LG and PGND pins. The power for the LG
gate-driver is sourced directly from the PVCC pin. The power
1.5ms
VOUT
VCC
EN
for the UG gate-driver is sourced from a “boot” capacitor
connected across the BOOT and PHASE pins. The boot
capacitor is charged from a 5V bias supply through a “boot
diode” each time the low-side MOSFET turns on, pulling the
PHASE pin low. The ISL6269 has an integrated boot diode
connected from the PVCC pin to the BOOT pin.
t LGFUGR
t UGFLGR
50%
PGOOD
2.75ms
FIGURE 4. SOFT-START SEQUENCE
The PGOOD pin indicates when the converter is capable of
supplying regulated voltage. The PGOOD pin is an
undefined impedance if V VCC has not reached the rising
POR threshold V VCC_THR , or if V VCC is below the falling POR
threshold V VCC_THF . The ISL6269 features a unique fault-
identification capability that can drastically reduce trouble-
shooting time and effort. The pull-down resistance of the
PGOOD pin corresponds to the fault status of the controller.
During soft-start or if an undervoltage fault occurs, the
PGOOD pulldown resistance is 95 Ω , or 30 Ω for an
overcurrent fault, or 60 Ω for an overvoltage fault.
TABLE 1. PGOOD PULL-DOWN RESISTANCE
UG
LG
50%
FIGURE 5. LG AND UG DEAD-TIME
Diode Emulation
The ISL6269 normally operates in continuous-conduction-
mode (CCM), minimizing conduction losses by forcing the
low-side MOSFET to operate as a synchronous rectifier. An
improvement in light-load efficiency is achieved by allowing
the converter to operate in diode-emulation-mode (DEM),
CONDITION
VCC Below POR
Soft Start or Undervoltage
Overvoltage
Overcurrent
PGOOD RESISTANCE
Undefined
95 Ω
60 Ω
30 Ω
where the low-side MOSFET behaves as a smart-diode,
forcing the device to block negative inductor current flow.
The ISL6269 can be configured to operate in DEM by setting
the FCCM pin low. Setting the FCCM pin high will disable
DEM.
Positive-going inductor current flows from either the source
of the high-side MOSFET, or the drain of the low-side
MOSFET Gate-Drive Outputs LG and UG
The ISL6269 has internal gate-drivers for the high-side and
low-side N-Channel MOSFETs. The LG gate-driver is
optimized for low duty-cycle applications where the low-side
MOSFET conduction losses are dominant, requiring a low
r DS(ON) MOSFET. The LG pulldown resistance is small in
order to clamp the gate of the MOSFET below the V GS(th) at
turnoff. The current transient through the gate at turnoff can
be considerable because the switching charge of a low
r DS(ON) MOSFET can be large. Adaptive shoot-through
protection prevents a gate-driver output from turning on until
8
MOSFET. Negative-going inductor current usually flows into
the drain of the low-side MOSFET. When the low-side
MOSFET conducts positive inductor current, the phase
voltage will be negative with respect to the GND and PGND
pins. Conversely, when the low-side MOSFET conducts
negative inductor current, the phase voltage will be positive
with respect to the GND and PGND pins. Negative inductor
current occurs when the output load current is less than ?
the inductor ripple current. Sinking negative inductor current
through the low-side MOSFET lowers efficiency through
unnecessary conduction losses. Efficiency can be further
FN9177.3
June 25, 2009
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| ISL6269IRZ-T | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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