参数资料
型号: ISL62871HRUZ-T
厂商: Intersil
文件页数: 11/25页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 16-TQFN
标准包装: 3,000
系列: Robust Ripple Regulator™ (R³)
PWM 型: 控制器
输出数: 1
频率 - 最大: 330kHz
占空比: 100%
电源电压: 3.3 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -10°C ~ 100°C
封装/外壳: 16-UFQFN
包装: 带卷 (TR)
ISL62871, ISL62872
V SET ( X ) = V REF ? ? 1 + ---------- ?
V SET(x) where (x) is the first, second, third, or fourth setpoint
reference voltage where:
- V SET1 < V SET2 < V SET3 < V SET4
- V OUT1 < V OUT2 < V OUT3 < V OUT4
The V SET1 setpoint is fixed at 500mV because it
corresponds to the closure of internal switch SW0 that
configures the V SET amplifier as a unity-gain voltage
follower for the 500mV voltage reference V REF .
A feedback voltage-divider network may be required to
achieve the desired reference voltages. Using the feedback
voltage-divider allows the maximum output voltage of the
converter to be higher than the 1.5V maximum setpoint
reference voltage that can be programmed on the SREF pin.
Likewise, the feedback voltage-divider allows the minimum
output voltage of the converter to be higher than the fixed
500mV setpoint reference voltage of V SET1 . Scale the
voltage-divider network such that the voltage V FB equals the
voltage V SREF when the converter output voltage is at the
desired level. The voltage-divider relation is given in
The setpoint reference voltages are programmed with
resistors that use the naming convention R SET(x) where (x)
is the first, second, third, or fourth programming resistor
connected in series starting at the SREF pin and ending at
the GND pin. When one of the internal switches closes, it
connects the inverting input of the V SET amplifier to a
specific node among the string of R SET programming
resistors. All the resistors between that node and the SREF
pin serve as the feedback impedance R F of the V SET
amplifier. Likewise, all the resistors between that node and
the GND pin serve as the input impedance R IN of the V SET
amplifier. Equation 4 gives the general form of the gain
equation for the V SET amplifier:
? R F ?
(EQ. 4)
? R IN ?
Where:
- V REF is the 500mV internal reference of the IC
- V SET(x) is the resulting setpoint reference voltage that
appears at the SREF pin
V FB = V OUT ? ----------------------------------
R + R
Equation 1:
R OFS
FB OFS
(EQ. 1)
Calculating Setpoint Voltage Programming
Resistor Values for ISL62872
TABLE 1. ISL62872 VID TRUTH TABLE
Where:
VID STATE
RESULT
- V FB = V SREF
- R FB is the loop-compensation feedback resistor that
connects from the FB pin to the converter output
- R OFS is the voltage-scaling programming resistor that
VID1
1
1
VID0
1
0
CLOSE
SW0
SW1
V SREF
V SET1
V SET2
V OUT
V OUT1
V OUT2
V SREF ( lim ) R OFS
V SET3
V OUT3
connects from the FB pin to the GND pin
The attenuation of the feedback voltage divider is written as:
K = ------------------------------- = ---------------------------------- (EQ. 2)
V OUT ( lim ) R FB + R OFS
Where:
- K is the attenuation factor
0 1 SW2
0 0 SW3 V SET4 V OUT4
First, determine the attenuation factor K . Next, assign an
initial value to R SET4 of approximately 100k Ω then calculate
R SET1 , R SET2 , and R SET3 using Equations 5, 6, and 7
respectively. The equation for the value of R SET1 is written
V REF ? K V SET2
- V SREF( lim ) is the V SREF voltage setpoint of either
500mV or 1.50V
- V OUT( lim ) is the output voltage of the converter when
as Equation 5:
R SET4 ? K V SET4 ? ( K V SET2 – V REF )
R SET1 = ----------------------------------------------------------------------------------------------------
(EQ. 5)
R SET2 = -----------------------------------------------------------------------------------------------------------
K V SET2 ? K V SET3
V SREF = V SREF( lim )
Since the voltage-divider network is in the feedback path, all
output voltage setpoints will be attenuated by K , so it follows
that all of the setpoint reference voltages will be attenuated
by K . It will be necessary then to include the attenuation
The equation for the value of R SET2 is written as Equation 6:
R SET4 ? K V SET4 ? ( K V SET3 – K V SET2 )
(EQ. 6)
The equation for the value of R SET3 is written as Equation 7:
R SET3 = --------------------------------------------------------------------------------
factor K in all the calculations for selecting the R SET
programming resistors.
R SET4 ? ( K V SET4 – K V SET3 )
K V SET3
(EQ. 7)
R OFS = --------------------------------------------
R SET1 + R SET2 + R SET3 + R SET4 ? 300k Ω
The value of offset resistor R OFS can be calculated only
after the value of loop-compensation resistor R FB has been
determined. The Calculation of R OFS is written as
Equation 3:
V SET ( x ) ? R FB
(EQ. 3)
V OUT – V SET ( x )
11
The sum of all the programming resistors should be
approximately 300k Ω as shown in Equation 8 otherwise
adjust the value of R SET4 and repeat the calculations.
(EQ. 8)
Equations 9, 10, 11 and 12 give the specific V SET gain
equations for the ISL62872 setpoint reference voltages.
FN6707.0
August 14, 2008
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